HD6417021 Hitachi Semiconductor, HD6417021 Datasheet - Page 419

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HD6417021

Manufacturer Part Number
HD6417021
Description
SuperH RISC engine
Manufacturer
Hitachi Semiconductor
Datasheet
• Bits 1 and 0 (PA0 mode (PA0MD1 and PA0MD0)): PA0MD1 and PA0MD0 select the
Bit 1: PA0MD1
0
1
14.3.3
The port B I/O register (PBIOR) is a 16-bit read/write register that selects input or output for
individual pins on a bit-by-bit basis. Bits PB15IOR–PB0IOR correspond to pins of port B. PBIOR
is enabled when the port B pins function as input/outputs (PB15–PB0), for ITU input capture and
output compare (TIOCA4, TIOCA3, TIOCA2, TIOCB4, TIOCB3, and TIOCB2), and as serial
clocks (SCK1, SCK0). For other functions, they are disabled. For port B pin functions PB15–PB0,
and TIOCA4, TIOCA3, TIOCA2, TIOCB4, TIOCB3, and TIOCB2, and SCK1/SCK0, a given pin
in port B is an output pin if its corresponding PBIOR bit is set to 1, and an input pin if the bit is
cleared to 0.
PBIOR is initialized to H'0000 by power-on resets; however, it is not initialized for manual resets,
standby mode, or sleep mode.
function of the PA0/CS4/TIOCA0 pin.
Initial value:
Initial value:
Bit name:
Bit name:
Port B I/O Register (PBIOR)
R/W:
R/W:
Bit:
Bit:
Bit 0: PA0MD0
0
1
0
1
PB15
R/W
PB7
R/W
IOR
IOR
15
0
7
0
PB14
R/W
PB6
R/W
IOR
IOR
14
0
6
0
Function
Input/output (PA0)
Chip select output (CS4) (initial value)
ITU input capture/output compare (TIOCA0)
Reserved
PB13
R/W
PB5
R/W
IOR
IOR
13
0
5
0
PB12
R/W
PB4
R/W
IOR
IOR
12
0
4
0
PB11
R/W
PB3
R/W
IOR
IOR
11
0
3
0
PB10
R/W
PB2
R/W
IOR
IOR
10
0
2
0
PB9
R/W
PB1
R/W
IOR
IOR
9
0
1
0
HITACHI 407
PB8
R/W
PB0
R/W
IOR
IOR
8
0
0
0

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