MC908LD64IFUE Freescale Semiconductor, MC908LD64IFUE Datasheet - Page 119

• Manufacturer Part Number: MC908LD64IFUE
• Description: IC MCU 8BIT FOR LCD 64-QFP
• Manufacturer: Freescale Semiconductor
• Series: HC08r

Specifications of MC908LD64IFUE

• Core Processor: HC08
• Core Size: 8-Bit
• Speed: 6MHz
• Connectivity: I²C, USB
• Peripherals: OSD, POR, PWM
• Number Of I /o: 39
• Program Memory Size: 60KB (60K x 8)
• Program Memory Type: FLASH
• Ram Size: 2K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 6x8b
• Oscillator Type: Internal
• Operating Temperature: 0°C ~ 85°C
• Package / Case: 64-QFP
• Processor Series: HC08LD
• Core: HC08
• Data Bus Width: 8 bit
• Data Ram Size: 2 KB
• Interface Type: I2C, USB
• Maximum Clock Frequency: 6 MHz
• Number Of Programmable I/os: 39
• Number Of Timers: 2
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Development Tools By Supplier: FSICEBASE, M68CBL05CE
• Minimum Operating Temperature: 0 C
• On-chip Adc: 8 bit, 6 Channel
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details

9.4.2 Active Resets from Internal Sources
MC68HC908LD64
Freescale Semiconductor
—
Rev. 3.0
SIM module in HC08 has the capability to drive the RST pin low when
internal reset events occur.
All internal reset sources actively pull the RST pin low for 32 OSCXCLK
cycles to allow resetting of external peripherals. The internal reset signal
IRST continues to be asserted for an additional 32 cycles (see
5. Internal Reset
address, illegal opcode, COP timeout, or POR (see
of Internal
4096 OSCXCLK cycles during which the SIM forces the RST pin low.
The internal reset signal then follows the sequence from the falling edge
of RST shown in
The COP reset is asynchronous to the bus clock.
The active reset feature allows the part to issue a reset to peripherals
and other chips within a system built around the MCU.
OSCXCLK
OSCOUT
IRST
RST
RST
IAB
IAB
System Integration Module (SIM)
PC
Reset). Note that for POR resets, the SIM cycles through
Figure 9-6. Sources of Internal Reset
Figure
Figure 9-4. External Reset Timing
ILLEGAL ADDRESS RST
Timing). An internal reset can be caused by an illegal
RST PULLED LOW BY MCU
Figure 9-5. Internal Reset Timing
ILLEGAL OPCODE RST
9-5.
COPRST
32 CYCLES
POR
LVI
INTERNAL RESET
System Integration Module (SIM)
VECT H VECT L
32 CYCLES
Reset and System Initialization
Figure 9-6. Sources
VECTOR HIGH
Figure 9-
Data Sheet
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