MC908LD64IFUE Freescale Semiconductor, MC908LD64IFUE Datasheet - Page 172

IC MCU 8BIT FOR LCD 64-QFP

MC908LD64IFUE

Manufacturer Part Number
MC908LD64IFUE
Description
IC MCU 8BIT FOR LCD 64-QFP
Manufacturer
Freescale Semiconductor
Series
HC08r
Datasheet

Specifications of MC908LD64IFUE

Core Processor
HC08
Core Size
8-Bit
Speed
6MHz
Connectivity
I²C, USB
Peripherals
OSD, POR, PWM
Number Of I /o
39
Program Memory Size
60KB (60K x 8)
Program Memory Type
FLASH
Ram Size
2K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 6x8b
Oscillator Type
Internal
Operating Temperature
0°C ~ 85°C
Package / Case
64-QFP
Processor Series
HC08LD
Core
HC08
Data Bus Width
8 bit
Data Ram Size
2 KB
Interface Type
I2C, USB
Maximum Clock Frequency
6 MHz
Number Of Programmable I/os
39
Number Of Timers
2
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Development Tools By Supplier
FSICEBASE, M68CBL05CE
Minimum Operating Temperature
0 C
On-chip Adc
8 bit, 6 Channel
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
 Details

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
MC908LD64IFUE
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
Part Number:
MC908LD64IFUE
Manufacturer:
FREESCALE
Quantity:
20 000
Company:
Part Number:
MC908LD64IFUE
Quantity:
17
Pulse Width Modulator (PWM)
Data Sheet
172
Addr.
$0070
$0071
$0072
$0073
$0074
$0075
$0076
$0077
$0078
PWM Control Register
PWM0 Data Register
PWM1 Data Register
PWM2 Data Register
PWM3 Data Register
PWM4 Data Register
PWM5 Data Register
PWM6 Data Register
PWM7 Data Register
Register Name
(PWMCR)
(0PWM)
(1PWM)
(2PWM)
(3PWM)
(4PWM)
(5PWM)
(6PWM)
(7PWM)
Combining the 5-bit PWM together with the 3-bit BRM, the average duty
cycle at the output will be (M+N/8)/32, where M is the content of the 5-bit
PWM portion, and N is the content of the 3-bit BRM portion. Using this
mechanism, a true 8-bit resolution PWM type DAC with reasonably high
repetition rate can be obtained.
The value of each PWM data register is continuously compared with the
content of an internal counter to determine the state of each PWM
channel output pin. Double buffering is not used in this PWM design.
Reset:
Read:
Write:
Read:
Write:
Read:
Write:
Read:
Write:
Read:
Write:
Read:
Write:
Read:
Write:
Read:
Write:
Read:
Write:
Figure 12-1. PWM I/O Register Summary
PWM7E
0PWM4
1PWM4
2PWM4
3PWM4
4PWM4
5PWM4
6PWM4
7PWM4
Bit 7
0
Pulse Width Modulator (PWM)
0PWM3
1PWM3
2PWM3
3PWM3
4PWM3
5PWM3
6PWM3
7PWM3
PWM6E
6
0
0PWM2
1PWM2
2PWM2
3PWM2
4PWM2
5PWM2
6PWM2
7PWM2
PWM5E
5
0
0PWM1
1PWM1
2PWM1
3PWM1
4PWM1
5PWM1
6PWM1
7PWM1
PWM4E
4
0
0PWM0
1PWM0
2PWM0
3PWM0
4PWM0
5PWM0
6PWM0
7PWM0
PWM3E
3
0
MC68HC908LD64
PWM2E
0BRM2
1BRM2
2BRM2
3BRM2
4BRM2
5BRM2
6BRM2
7BRM2
Freescale Semiconductor
2
0
PWM1E
0BRM1
1BRM1
2BRM1
3BRM1
4BRM1
5BRM1
6BRM1
7BRM1
1
0
PWM0E
Rev. 3.0
0BRM0
1BRM0
2BRM0
3BRM0
4BRM0
5BRM0
6BRM0
7BRM0
Bit 0
0

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