MC908LD64IFUE Freescale Semiconductor, MC908LD64IFUE Datasheet - Page 142

• Manufacturer Part Number: MC908LD64IFUE
• Description: IC MCU 8BIT FOR LCD 64-QFP
• Manufacturer: Freescale Semiconductor
• Series: HC08r

Specifications of MC908LD64IFUE

• Core Processor: HC08
• Core Size: 8-Bit
• Speed: 6MHz
• Connectivity: I²C, USB
• Peripherals: OSD, POR, PWM
• Number Of I /o: 39
• Program Memory Size: 60KB (60K x 8)
• Program Memory Type: FLASH
• Ram Size: 2K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 6x8b
• Oscillator Type: Internal
• Operating Temperature: 0°C ~ 85°C
• Package / Case: 64-QFP
• Processor Series: HC08LD
• Core: HC08
• Data Bus Width: 8 bit
• Data Ram Size: 2 KB
• Interface Type: I2C, USB
• Maximum Clock Frequency: 6 MHz
• Number Of Programmable I/os: 39
• Number Of Timers: 2
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Development Tools By Supplier: FSICEBASE, M68CBL05CE
• Minimum Operating Temperature: 0 C
• On-chip Adc: 8 bit, 6 Channel
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details

Monitor ROM (MON)
10.4.2 Data Format
Data Sheet
142
Monitor mode uses different vectors for reset and SWI. The alternate
vectors are in the $FE page instead of the $FF page and allow code
execution from the internal monitor firmware instead of user code.
When the host computer has completed downloading code into the MCU
RAM, This code can be executed by driving PTA0 low while asserting
RST low and then high. The internal monitor ROM firmware will interpret
the low on PTA0 as an indication to jump to RAM, and execution control
will then continue from RAM. Execution of an SWI from the downloaded
code will return program control to the internal monitor ROM firmware.
Alternatively, the host can send a RUN command, which executes an
RTI, and this can be used to send control to the address on the stack
pointer.
The COP module is disabled in monitor mode as long as V
to the IRQ or the RST pin. (See
(SIM)
Table 10-2
monitor mode.
Communication with the monitor ROM is in standard non-return-to-zero
(NRZ) mark/space data format. (See
Notes:
1. If the high voltage (V
output. The COP is an option enabled or disabled by the COPD bit in the configuration
register.
Monitor
Modes
User
for more information on modes of operation.)
is a summary of the differences between user mode and
Monitor ROM (MON)
Disabled
Enabled
COP
TST
Table 10-2. Mode Differences
) is removed from the IRQ pin, the SIM asserts its COP enable
(1)
Vector
$FFFE
$FEFE
Reset
High
Section 9. System Integration Module
Figure 10-2
Functions
Vector
$FEFF
$FFFF
Reset
Low
MC68HC908LD64
and
Freescale Semiconductor
Vector
$FFFC
$FEFC
High
SWI
Figure
TST
is applied
10-3.)
—
Vector
$FFFD
$FEFD
Low
SWI
Rev. 3.0