MC908LD64IFUE Freescale Semiconductor, MC908LD64IFUE Datasheet - Page 195

• Manufacturer Part Number: MC908LD64IFUE
• Description: IC MCU 8BIT FOR LCD 64-QFP
• Manufacturer: Freescale Semiconductor
• Series: HC08r

Specifications of MC908LD64IFUE

• Core Processor: HC08
• Core Size: 8-Bit
• Speed: 6MHz
• Connectivity: I²C, USB
• Peripherals: OSD, POR, PWM
• Number Of I /o: 39
• Program Memory Size: 60KB (60K x 8)
• Program Memory Type: FLASH
• Ram Size: 2K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 6x8b
• Oscillator Type: Internal
• Operating Temperature: 0°C ~ 85°C
• Package / Case: 64-QFP
• Processor Series: HC08LD
• Core: HC08
• Data Bus Width: 8 bit
• Data Ram Size: 2 KB
• Interface Type: I2C, USB
• Maximum Clock Frequency: 6 MHz
• Number Of Programmable I/os: 39
• Number Of Timers: 2
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Development Tools By Supplier: FSICEBASE, M68CBL05CE
• Minimum Operating Temperature: 0 C
• On-chip Adc: 8 bit, 6 Channel
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details

14.6.2 USB Hub Downstream Port Control Registers (HDP1CR–HDP4CR)
MC68HC908LD64
Freescale Semiconductor
—
Rev. 3.0
Address:
D0+, D0– — Root Port Differential Data
PENx — Downstream Port Enable Control Bit
Reset:
Read:
Read:
Read:
Read:
Write:
Write:
Write:
Write:
software is responsible to propagate the traffic between the root port
and the enabled downstream port by setting the RESUMx control bit.
Reset clears this bit.
EOF2 is generated by the MCU every millisecond, if SOF is not
detected when three or more EOF2 have occurred, software can set
the SUSPND bit and put the MCU into suspend mode.
These read-only bits are the differential data shown on the hub root
ports. When the SUSPND bit is 0, the data is the latched state at the
last EOF2 sample point. When the SUSPND bit is 1, the data reflects
the current state on the data line while accessing this register.
This read/write bit determines whether the enabled or disabled state
should be assigned to the downstream port. Setting this bit to 1
enables the port; clearing this bit to 0 disables the port. In the enabled
state a full-speed port propagates all downstream signaling;
Figure 14-4. USB Hub Downstream Port Control Registers
X = Indeterminate
PEN1
PEN2
PEN3
PEN4
Bit 7
Universal Serial Bus Module (USB)
$0051–$0054
0
LOWSP1
LOWSP2
LOWSP3
LOWSP4
6
0
HRP1CR–HRP4CR
(HDP1CR–HDP4CR)
RST1
RST2
RST3
RST4
5
0
RESUM1
RESUM2
RESUM3
RESUM4
= Unimplemented
4
0
SUSP1
SUSP2
SUSP3
SUSP4
Universal Serial Bus Module (USB)
3
0
Hub Function I/O Registers
2
0
0
0
0
0
D1+
D2+
D3+
D4+
1
X
Data Sheet
Bit 0
D1–
D2–
D3–
D4–
X
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