MC908LD64IFUE Freescale Semiconductor, MC908LD64IFUE Datasheet - Page 265

IC MCU 8BIT FOR LCD 64-QFP

MC908LD64IFUE

Manufacturer Part Number
MC908LD64IFUE
Description
IC MCU 8BIT FOR LCD 64-QFP
Manufacturer
Freescale Semiconductor
Series
HC08r
Datasheet

Specifications of MC908LD64IFUE

Core Processor
HC08
Core Size
8-Bit
Speed
6MHz
Connectivity
I²C, USB
Peripherals
OSD, POR, PWM
Number Of I /o
39
Program Memory Size
60KB (60K x 8)
Program Memory Type
FLASH
Ram Size
2K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 6x8b
Oscillator Type
Internal
Operating Temperature
0°C ~ 85°C
Package / Case
64-QFP
Processor Series
HC08LD
Core
HC08
Data Bus Width
8 bit
Data Ram Size
2 KB
Interface Type
I2C, USB
Maximum Clock Frequency
6 MHz
Number Of Programmable I/os
39
Number Of Timers
2
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Development Tools By Supplier
FSICEBASE, M68CBL05CE
Minimum Operating Temperature
0 C
On-chip Adc
8 bit, 6 Channel
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
 Details

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17
17.6.4 Hsync Frequency Registers (HFRs)
MC68HC908LD64
Freescale Semiconductor
Rev. 3.0
Address:
Address:
CPW[1:0] — Clamp Pulse Width
This register pair contains the 13-bit Hsync frequency count value and
an overflow bit.
Reset:
Reset:
Read:
Read: HOVER
Write:
Write:
The CPW1 and CPW0 bits are used to select the output clamp pulse
width. Reset clears these bits, selecting a default clamp pulse width
between 0.33µs and 0.375µs. These bits always read as Zeros.
$0043
$0044
HFH7
Bit 7
Bit 7
0
0
Figure 17-8. Hsync Frequency High Register
Figure 17-9. Hsync Frequency Low Register
CPW1
0
0
1
1
= Unimplemented
HFH6
Sync Processor
6
0
6
0
0
Table 17-6. Clamp Pulse Width
HFH5
5
0
5
0
0
HFH4
HFL4
CPW0
4
0
4
0
0
1
0
1
HFH3
HFL3
3
0
3
0
Sync Processor I/O Registers
Clamp Pulse Width
0.33µs to 0.375µs
0.75µs to 0.792µs
0.5µs to 0.542µs
HFH2
HFL2
2µs to 2.042µs
2
0
2
0
HFH1
HFL1
Sync Processor
1
0
1
0
Data Sheet
HFH0
HFL0
Bit 0
Bit 0
0
0
265

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