MC908LD64IFUE Freescale Semiconductor, MC908LD64IFUE Datasheet - Page 268

• Manufacturer Part Number: MC908LD64IFUE
• Description: IC MCU 8BIT FOR LCD 64-QFP
• Manufacturer: Freescale Semiconductor
• Series: HC08r

Specifications of MC908LD64IFUE

• Core Processor: HC08
• Core Size: 8-Bit
• Speed: 6MHz
• Connectivity: I²C, USB
• Peripherals: OSD, POR, PWM
• Number Of I /o: 39
• Program Memory Size: 60KB (60K x 8)
• Program Memory Type: FLASH
• Ram Size: 2K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 6x8b
• Oscillator Type: Internal
• Operating Temperature: 0°C ~ 85°C
• Package / Case: 64-QFP
• Processor Series: HC08LD
• Core: HC08
• Data Bus Width: 8 bit
• Data Ram Size: 2 KB
• Interface Type: I2C, USB
• Maximum Clock Frequency: 6 MHz
• Number Of Programmable I/os: 39
• Number Of Timers: 2
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Development Tools By Supplier: FSICEBASE, M68CBL05CE
• Minimum Operating Temperature: 0 C
• On-chip Adc: 8 bit, 6 Channel
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details

Sync Processor
17.6.6 H & V Sync Output Control Register (HVOCR)
Data Sheet
268
Address:
ATPOL — Auto Polarity
FSHF — Fast Horizontal Frequency Count
Reset:
Read:
Write:
This bit, together with the VINVO or HINVO bits in SPCSR controls
the output polarity of the VOUT or HOUT signals respectively. Reset
clears this bit (see
This bit is set to shorten the measurement cycle of the horizontal
frequency. If it is set, only HFH[7:0] and HFL[4:2] will be updated by
the Hsync counter, providing a count in a 8ms window in every
8.192ms, with HFL[1:0] reading as zeros. Therefore, user can
determine the horizontal frequency change within 8.192ms to protect
critical circuitry. Reset clears this bit.
Figure 17-11. H&V Sync Output Control Register (HVOCR)
ATPOL
1 = Number of Hsync pulses is counted in an 8ms window
0 = Number of Hsync pulses is counted in a 32ms window
0
0
1
1
$003F
Bit 7
Table 17-8. ATPOL, VINVO, and HINVO setting
= Unimplemented
Sync Processor
6
VINVO / HINVO
Table
0
1
0
1
5
17-8).
DCLKPH1 DCLKPH0
4
0
Same polarity as sync input
Inverted polarity of sync input
Negative polarity sync output
Positive polarity sync output
R
3
0
Sync Outputs:
MC68HC908LD64
VOUT/HOUT
= Reserved
Freescale Semiconductor
2
R
HVOCR1 HVOCR0
1
0
—
Rev. 3.0
Bit 0
0