MC908LD64IFUE Freescale Semiconductor, MC908LD64IFUE Datasheet - Page 196

• Manufacturer Part Number: MC908LD64IFUE
• Description: IC MCU 8BIT FOR LCD 64-QFP
• Manufacturer: Freescale Semiconductor
• Series: HC08r

Specifications of MC908LD64IFUE

• Core Processor: HC08
• Core Size: 8-Bit
• Speed: 6MHz
• Connectivity: I²C, USB
• Peripherals: OSD, POR, PWM
• Number Of I /o: 39
• Program Memory Size: 60KB (60K x 8)
• Program Memory Type: FLASH
• Ram Size: 2K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 6x8b
• Oscillator Type: Internal
• Operating Temperature: 0°C ~ 85°C
• Package / Case: 64-QFP
• Processor Series: HC08LD
• Core: HC08
• Data Bus Width: 8 bit
• Data Ram Size: 2 KB
• Interface Type: I2C, USB
• Maximum Clock Frequency: 6 MHz
• Number Of Programmable I/os: 39
• Number Of Timers: 2
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Development Tools By Supplier: FSICEBASE, M68CBL05CE
• Minimum Operating Temperature: 0 C
• On-chip Adc: 8 bit, 6 Channel
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details

Universal Serial Bus Module (USB)
Data Sheet
196
NOTE:
LOWSPx — Full-Speed / Low-Speed Port Control Bit
After a port is enabled, the hub will automatically generate a low-speed
keep awake signal to the port every millisecond.
RSTx — Force Reset to the Downstream Port
RESUMx — Force Resume to the Downstream Port
a low-speed port propagates downstream low-speed packet traffic
when preceded by the preamble PID. An enabled port propagates all
upstream signaling including full-speed and low-speed packets. This
bit can be set to 1 by the host request only. It can be cleared either by
hardware when a fault condition was detected or by software through
the host request. Reset clears this bit.
This read/write bit specifies the attached device in the downstream
port is low-speed device or full-speed device. Software is responsible
to detect the device attachment and whether a device is full or
low-speed. Reset clears this bit.
This read/write bit forces a reset signal (SE0 state) onto the USB
downstream port data lines. This bit can be set by the host request
SetPortFeature (PORT_RESET) only. Software should control the
timing of the forced reset signaling downstream for at least 10ms.
Reset clears this bit.
This read/write bit forces a resume signal (K state) onto the USB
downstream port data lines. This bit is set to reflect the resume signal
when the software detects the remote resume signal on the data lines
of the selective suspend downstream port. Downstream selective
resume sequence to a port may also be initiated via the host request
ClearPortFeature (PORT_SUSPEND). Software should control the
timing of the forced resume signaling downstream for at least 20ms.
1 = Downstream port is enabled
0 = Downstream port is disabled
1 = Downstream port is low-speed
0 = Downstream port is full-speed
1 = Force downstream port data lines to SE0 state
0 = Default
Universal Serial Bus Module (USB)
MC68HC908LD64
Freescale Semiconductor
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Rev. 3.0