MC908LD64IFUE Freescale Semiconductor, MC908LD64IFUE Datasheet - Page 262

IC MCU 8BIT FOR LCD 64-QFP

MC908LD64IFUE

Manufacturer Part Number
MC908LD64IFUE
Description
IC MCU 8BIT FOR LCD 64-QFP
Manufacturer
Freescale Semiconductor
Series
HC08r
Datasheet

Specifications of MC908LD64IFUE

Core Processor
HC08
Core Size
8-Bit
Speed
6MHz
Connectivity
I²C, USB
Peripherals
OSD, POR, PWM
Number Of I /o
39
Program Memory Size
60KB (60K x 8)
Program Memory Type
FLASH
Ram Size
2K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 6x8b
Oscillator Type
Internal
Operating Temperature
0°C ~ 85°C
Package / Case
64-QFP
Processor Series
HC08LD
Core
HC08
Data Bus Width
8 bit
Data Ram Size
2 KB
Interface Type
I2C, USB
Maximum Clock Frequency
6 MHz
Number Of Programmable I/os
39
Number Of Timers
2
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Development Tools By Supplier
FSICEBASE, M68CBL05CE
Minimum Operating Temperature
0 C
On-chip Adc
8 bit, 6 Channel
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
 Details

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Part Number:
MC908LD64IFUE
Manufacturer:
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Quantity:
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Part Number:
MC908LD64IFUE
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Sync Processor
Data Sheet
262
COINV — Clamp Output Invert
BPOR — Back Porch
SOUT — Sync Output Enable
This bit is set to invert the clamp pulse output to negative. Reset
clears this bit.
This bit defines the triggering edge of the clamp pulse output relative
to the HSYNC input. Reset clears this bit.
This bit will select the output signals for the VOUT and HOUT pins and
generate the DE and DCLK signals to the pins. Reset clears this bit.
1 = Clamp output is set for negative pulses
0 = Clamp output is set for positive pulses
1 = Clamp pulse is generated on the trailing edge of HSYNC
0 = Clamp pulse is generated on the leading edge of HSYNC
1 = VOUT, HOUT, DE, and DCLK outputs are internally generated
0 = VOUT and HOUT outputs are processed VSYNC and HSYNC
free-running timing pulses with frequencies determined by
HVCOR[1:0] bits in HVCOR and CGM values.
inputs respectively and DE and DCLK are hold as logic low.
Sync Processor
MC68HC908LD64
Freescale Semiconductor
Rev. 3.0

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