MC908LD64IFUE Freescale Semiconductor, MC908LD64IFUE Datasheet - Page 291

IC MCU 8BIT FOR LCD 64-QFP

MC908LD64IFUE

Manufacturer Part Number
MC908LD64IFUE
Description
IC MCU 8BIT FOR LCD 64-QFP
Manufacturer
Freescale Semiconductor
Series
HC08r
Datasheet

Specifications of MC908LD64IFUE

Core Processor
HC08
Core Size
8-Bit
Speed
6MHz
Connectivity
I²C, USB
Peripherals
OSD, POR, PWM
Number Of I /o
39
Program Memory Size
60KB (60K x 8)
Program Memory Type
FLASH
Ram Size
2K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 6x8b
Oscillator Type
Internal
Operating Temperature
0°C ~ 85°C
Package / Case
64-QFP
Processor Series
HC08LD
Core
HC08
Data Bus Width
8 bit
Data Ram Size
2 KB
Interface Type
I2C, USB
Maximum Clock Frequency
6 MHz
Number Of Programmable I/os
39
Number Of Timers
2
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Development Tools By Supplier
FSICEBASE, M68CBL05CE
Minimum Operating Temperature
0 C
On-chip Adc
8 bit, 6 Channel
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
 Details

Available stocks

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Part Number
Manufacturer
Quantity
Price
Part Number:
MC908LD64IFUE
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
Part Number:
MC908LD64IFUE
Manufacturer:
FREESCALE
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MC68HC908LD64
Freescale Semiconductor
NOTE:
Rev. 3.0
The width of bottom side shadowing is counted in numbers of columns
and is aligned with the character width (12 dots or 16 dots) of the
following row. Therefore it is possible to have misalignment of this
shadowing while different character formats are used by the last row
inside the window and first row outside the window. The window
shadowing width of row 14 is determined by number of columns of
window times 12 dots.
Row 15, Column 20:
RSPACE — Row Spacing
Row 15, Column 21:
PGE — Screen Video Pattern Enable
PGR, PGG, PGB — Screen Video Pattern Color
15
15
These bits define the spacing between the display rows, in units of
horizontal scan lines. Due to the non-uniform expansion of the BRM
algorithm used for character height control, this register is normally
used for maintaining a constant OSD menu height for different display
modes, instead of adjusting the character heights. The default value
is 0, i.e. no extra lines inserted between.
Set this bit to enable the free-running full-screen video pattern. Reset
clears this bit.
These bits define the color of the free-running full-screen video
pattern.
1 = Screen video pattern enabled
0 = Screen video pattern disabled
14
14
13
13
On-Screen Display (OSD)
12
12
11
11
10
10
9
9
8
8
PGE
7
7
6
6
5
5
MSB
4
4
On-Screen Display (OSD)
3
3
RSPACE
PGR
2
2
PGG
OSD Registers
1
1
Data Sheet
PGB
LSB
0
0
291

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