UPD78F0386GK-8EU-A Renesas Electronics America, UPD78F0386GK-8EU-A Datasheet - Page 121

• Manufacturer Part Number: UPD78F0386GK-8EU-A
• Description: MCU 96KB FLASH 5KB RAM
• Manufacturer: Renesas Electronics America
• Series: 78K0/Lx2r

Specifications of UPD78F0386GK-8EU-A

• Core Processor: 78K/0
• Core Size: 8-Bit
• Speed: 20MHz
• Connectivity: 3-Wire SIO, I²C, LIN, UART/USART
• Peripherals: LCD, LVD, POR, PWM, WDT
• Number Of I /o: 26
• Program Memory Size: 96KB (96K x 8)
• Program Memory Type: FLASH
• Ram Size: 5K x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 5.5 V
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: *
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Data Converters: -

Address: FF9FH
OSCCTL
Symbol
Cautions 1. Be sure to set AMPH to 1 if the high-speed system clock oscillation frequency
Note
Remark f
EXCLK
EXCLK
AMPH
Figure 5-2. Format of Clock Operation Mode Select Register (OSCCTL)
<7>
0
0
1
1
0
1
After reset: 00H
EXCLKS and OSCSELS are used in combination with XTSTART (bit 6 of the processor
clock control register (PCC)). See (3) Setting of operation mode for subsystem clock
pin.
XH
2. Set AMPH before setting the peripheral functions after a reset release. The value
3. If the STOP instruction is executed with AMPH set to 1 when the internal high-
4. To change the value of EXCLK and OSCSEL, be sure to confirm that bit 7
: High-speed system clock oscillation frequency
1 MHz
10 MHz < f
OSCSEL
OSCSEL
exceeds 10 MHz.
of AMPH can be changed only once after a reset release. The clock supply to the
CPU is stopped for 5 s (MIN.) after AMPH has been set to 1.
speed oscillation clock or external main system clock is used as the CPU clock,
then the clock supply to the CPU is stopped for 5 s (MIN.) after the STOP mode
has been released.
stabilization time is counted after the STOP mode has been released.
(MSTOP) of the main OSC control register (MOC) is 1 (the X1 oscillator stops or
the external clock from the EXCLK pin is disabled).
<6>
0
1
0
1
f
XH
XH
R/W
CHAPTER 5 CLOCK GENERATOR
High-speed system clock
EXCLKS
I/O port mode
X1 oscillation mode
I/O port mode
External clock input
mode
10 MHz
20 MHz
pin operation mode
<5>
User’s Manual U17504EJ2V0UD
Note
OSCSELS
If the X1 clock is used as the CPU clock, oscillation
<4>
Operating frequency control
Note
I/O port
Crystal/ceramic resonator connection
I/O port
I/O port
3
0
P121/X1 pin
2
0
External clock input
P122/X2/EXCLK pin
1
0
AMPH
<0>
119