UPD78F0386GK-8EU-A Renesas Electronics America, UPD78F0386GK-8EU-A Datasheet - Page 519

• Manufacturer Part Number: UPD78F0386GK-8EU-A
• Description: MCU 96KB FLASH 5KB RAM
• Manufacturer: Renesas Electronics America
• Series: 78K0/Lx2r

Specifications of UPD78F0386GK-8EU-A

• Core Processor: 78K/0
• Core Size: 8-Bit
• Speed: 20MHz
• Connectivity: 3-Wire SIO, I²C, LIN, UART/USART
• Peripherals: LCD, LVD, POR, PWM, WDT
• Number Of I /o: 26
• Program Memory Size: 96KB (96K x 8)
• Program Memory Type: FLASH
• Ram Size: 5K x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 5.5 V
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: *
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Data Converters: -

(1) In 1.59 V POC mode (option byte: POCMODE = 0)
Supply voltage
oscillation clock (f
(when X1 oscillation
Internal reset signal
Internal high-speed
V
system clock (f
Notes 1.
Caution Set the low-voltage detector by software after the reset status is released (see CHAPTER 24
Remark V
POC
(V
= 1.59 V (TYP.)
High-speed
is selected)
DD
)
1.8 V
CPU
2.
3.
RH
XH
Note 1
V
)
)
0 V
Operation
LOW-VOLTAGE DETECTOR).
V
Figure 23-2. Timing of Generation of Internal Reset Signal by Power-on-Clear Circuit
LVI
The operation guaranteed range is 1.8 V
state when the supply voltage falls, use the reset function of the low-voltage detector, or input the low
level to the RESET pin.
If the voltage rises to 1.8 V at a rate slower than 0.5 V/ms (MAX.) on power application, input a low
level to the RESET pin after power application and before the voltage reaches 1.8 V, or set the 2.7
V/1.59 V POC mode by using an option byte (POCMODE = 1).
The internal high-speed oscillation clock and a high-speed system clock or subsystem clock can be
selected as the CPU clock. To use the X1 clock, use the OSTC register to confirm the lapse of the
oscillation stabilization time. To use the XT1 clock, use the timer function for confirmation of the lapse
of the stabilization time.
LVI
POC
stops
: LVI detection voltage
: POC detection voltage
specified by software.
0.5 V/ms (MAX.)
Wait for voltage
Wait for oscillation
accuracy
stabilization
(3.24 ms (TYP.))
Starting oscillation is
stabilization
Reset processing (20 s (TYP.))
Note 2
Set LVI to be
used for reset
oscillation clock)
(internal high-speed
CHAPTER 23 POWER-ON-CLEAR CIRCUIT
Normal operation
and Low-Voltage Detector (1/2)
Note 3
User’s Manual U17504EJ2V0UD
Reset period
(oscillation
stop)
Reset processing (20 s (TYP.))
Wait for oscillation
accuracy
stabilization
used for interrupt
Set LVI to be
oscillation clock)
(internal high-speed
V
Normal operation
specified by software.
Starting oscillation is
DD
5.5 V. To make the state at lower than 1.8 V reset
Note 3
Reset period
(oscillation
stop)
Wait for oscillation
accuracy
stabilization
(3.24 ms (TYP.))
Wait for voltage
specified by software.
Starting oscillation is
stabilization
Reset processing (20 s (TYP.))
used for reset
Set LVI to be
oscillation clock)
(internal high-speed
Normal operation
Note 3
Operation stops
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