UPD78F0386GK-8EU-A Renesas Electronics America, UPD78F0386GK-8EU-A Datasheet - Page 335

• Manufacturer Part Number: UPD78F0386GK-8EU-A
• Description: MCU 96KB FLASH 5KB RAM
• Manufacturer: Renesas Electronics America
• Series: 78K0/Lx2r

Specifications of UPD78F0386GK-8EU-A

• Core Processor: 78K/0
• Core Size: 8-Bit
• Speed: 20MHz
• Connectivity: 3-Wire SIO, I²C, LIN, UART/USART
• Peripherals: LCD, LVD, POR, PWM, WDT
• Number Of I /o: 26
• Program Memory Size: 96KB (96K x 8)
• Program Memory Type: FLASH
• Ram Size: 5K x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 5.5 V
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: *
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Data Converters: -

(1) Transmit buffer register 10 (SOTB10)
(2) Serial I/O shift register 10 (SIO10)
SCK10/P10/TxD0
SI10/P11/R
Remark (a): SO10 output
This register sets the transmit data.
Transmission/reception is started by writing data to SOTB10 when bit 7 (CSIE10) and bit 6 (TRMD10) of serial
operation mode register 10 (CSIM10) is 1.
The data written to SOTB10 is converted from parallel data into serial data by serial I/O shift register 10, and
output to the serial output pin (SO10).
SOTB10 can be written or read by an 8-bit memory manipulation instruction.
Reset signal generation sets this register to 00H.
Caution Do not access SOTB10 when CSOT10 = 1 (during serial communication).
This is an 8-bit register that converts data from parallel data into serial data and vice versa.
This register can be read by an 8-bit memory manipulation instruction.
Reception is started by reading data from SIO10 if bit 6 (TRMD10) of serial operation mode register 10 (CSIM10)
is 0.
During reception, the data is read from the serial input pin (SI10) to SIO10.
Reset signal generation sets this register to 00H.
Caution Do not access SIO10 when CSOT10 = 1 (during serial communication).
f
f
f
f
f
f
PRS
PRS
PRS
PRS
PRS
PRS
f
PRS
X
/2
/2
/2
/2
/2
/2
D0
/2
2
3
4
5
6
7
PM10
Transmit data
controller
Serial I/O shift
register 10 (SIO10)
Figure 15-1. Block Diagram of Serial Interface CSI10
Output latch
Clock start/stop controller &
clock phase controller
(P10)
8
Transmit controller
Internal bus
CHAPTER 15 SERIAL INTERFACE CSI10
Baud rate generator
Output latch
User’s Manual U17504EJ2V0UD
Transmit buffer
register 10 (SOTB10)
8
selector
Output
INTCSI10
(a)
Output latch
(P12)
PM12
SO10/P12
333