UPD78F0386GK-8EU-A Renesas Electronics America, UPD78F0386GK-8EU-A Datasheet - Page 571

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UPD78F0386GK-8EU-A

Manufacturer Part Number
UPD78F0386GK-8EU-A
Description
MCU 96KB FLASH 5KB RAM
Manufacturer
Renesas Electronics America
Series
78K0/Lx2r
Datasheet

Specifications of UPD78F0386GK-8EU-A

Core Processor
78K/0
Core Size
8-Bit
Speed
20MHz
Connectivity
3-Wire SIO, I²C, LIN, UART/USART
Peripherals
LCD, LVD, POR, PWM, WDT
Number Of I /o
26
Program Memory Size
96KB (96K x 8)
Program Memory Type
FLASH
Ram Size
5K x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 5.5 V
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
*
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Data Converters
-
28.2 Operation List
8-bit data
transfer
Instruction
Notes 1.
Remarks 1. One instruction clock cycle is one cycle of the CPU clock (f
Group
2.
3.
MOV
XCH
Mnemonic
2. This clock cycle applies to the internal ROM program.
When the internal high-speed RAM area is accessed or for an instruction with no data access
When an area except the internal high-speed RAM area is accessed
Except “r = A”
control register (PCC).
r, #byte
saddr, #byte
sfr, #byte
A, r
r, A
A, saddr
saddr, A
A, sfr
sfr, A
A, !addr16
!addr16, A
PSW, #byte
A, PSW
PSW, A
A, [DE]
[DE], A
A, [HL]
[HL], A
A, [HL + byte]
[HL + byte], A
A, [HL + B]
[HL + B], A
A, [HL + C]
[HL + C], A
A, r
A, saddr
A, sfr
A, !addr16
A, [DE]
A, [HL]
A, [HL + byte]
A, [HL + B]
A, [HL + C]
Operands
CHAPTER 28 INSTRUCTION SET
Note 3
Note 3
Note 3
User’s Manual U17504EJ2V0UD
Bytes
2
3
3
1
1
2
2
2
2
3
3
3
2
2
1
1
1
1
2
2
1
1
1
1
1
2
2
3
1
1
2
2
2
Note 1
4
6
2
2
4
4
8
8
4
4
4
4
8
8
6
6
6
6
2
4
8
4
4
8
8
8
Clocks
Note 2
10
10
10
10
7
7
5
5
5
9
7
5
5
5
5
7
7
6
5
9
5
5
9
9
7
7
6
6
6
r
(saddr)
sfr
A
r
A
(saddr)
A
sfr
A
(addr16)
PSW
A
PSW
A
(DE)
A
(HL)
A
(HL + byte)
A
(HL + B)
A
(HL + C)
A
A
A
A
A
A
A
A
A
byte
A
r
(saddr)
sfr
(addr16)
PSW
(DE)
(HL)
(HL + byte)
(HL + B)
(HL + C)
r
(saddr)
(sfr)
(addr16)
(DE)
(HL)
(HL + byte)
(HL + B)
(HL + C)
byte
A
A
A
byte
A
byte
A
A
A
A
CPU
A
) selected by the processor clock
Operation
Z AC CY
Flag
569

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