UPD78F0386GK-8EU-A Renesas Electronics America, UPD78F0386GK-8EU-A Datasheet - Page 137

• Manufacturer Part Number: UPD78F0386GK-8EU-A
• Description: MCU 96KB FLASH 5KB RAM
• Manufacturer: Renesas Electronics America
• Series: 78K0/Lx2r

Specifications of UPD78F0386GK-8EU-A

• Core Processor: 78K/0
• Core Size: 8-Bit
• Speed: 20MHz
• Connectivity: 3-Wire SIO, I²C, LIN, UART/USART
• Peripherals: LCD, LVD, POR, PWM, WDT
• Number Of I /o: 26
• Program Memory Size: 96KB (96K x 8)
• Program Memory Type: FLASH
• Ram Size: 5K x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 5.5 V
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: *
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Data Converters: -

(2) Example of setting procedure when using the external main system clock
(3) Example of setting procedure when using high-speed system clock as CPU clock and peripheral
<4> Waiting for the stabilization of the oscillation of X1 clock
Cautions 1. Do not change the value of EXCLK and OSCSEL while the X1 clock is operating.
<1> Setting frequency (OSCCTL register)
<2> Setting P121/X1 and P122/X2/EXCLK pins and selecting operation mode (OSCCTL register)
<3> Controlling external main system clock input (MOC register)
Cautions 1. Do not change the value of EXCLK and OSCSEL while the external main system clock is
hardware clock
<1> Setting high-speed system clock oscillation
Check the OSTC register and wait for the necessary time.
During the wait time, other software processing can be executed with the internal high-speed oscillation
clock.
Using AMPH, set the frequency to be used.
Note Set AMPH before setting the peripheral functions after a reset release. The value of AMPH can
Remark f
When EXCLK and OSCSEL are set to 1, the mode is switched from port mode to external clock input
mode.
When MSTOP is cleared to 0, the input of the external main system clock is enabled.
(See 5.6.1 (1) Example of setting procedure when oscillating the X1 clock and (2) Example of
setting procedure when using the external main system clock.)
Note The setting of <1> is not necessary when high-speed system clock is already operating.
AMPH
EXCLK
2. Set the X1 clock after the supply voltage has reached the operable voltage of the clock to
2. Set the external main system clock after the supply voltage has reached the operable
0
1
1
be changed only once after a reset release. When AMPH is set to 1, the clock supply to the CPU
is stopped for 5 s (MIN.).
Note
be used (see CHAPTER 29 ELECTRICAL SPECIFICATIONS).
operating.
voltage of the clock to be used (see CHAPTER 29 ELECTRICAL SPECIFICATIONS).
XH
1 MHz
10 MHz < f
: High-speed system clock oscillation frequency
OSCSEL
1
f
XH
XH
External clock input mode
Operation Mode of High-
Speed System Clock Pin
10 MHz
20 MHz
CHAPTER 5 CLOCK GENERATOR
User’s Manual U17504EJ2V0UD
Operating Frequency Control
Note
I/O port
P121/X1 Pin
External clock input
P122/X2/EXCLK Pin
135