UPD78F0386GK-8EU-A Renesas Electronics America, UPD78F0386GK-8EU-A Datasheet - Page 332

• Manufacturer Part Number: UPD78F0386GK-8EU-A
• Description: MCU 96KB FLASH 5KB RAM
• Manufacturer: Renesas Electronics America
• Series: 78K0/Lx2r

Specifications of UPD78F0386GK-8EU-A

• Core Processor: 78K/0
• Core Size: 8-Bit
• Speed: 20MHz
• Connectivity: 3-Wire SIO, I²C, LIN, UART/USART
• Peripherals: LCD, LVD, POR, PWM, WDT
• Number Of I /o: 26
• Program Memory Size: 96KB (96K x 8)
• Program Memory Type: FLASH
• Ram Size: 5K x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 5.5 V
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: *
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Data Converters: -

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Therefore, the maximum receivable baud rate at the transmission destination is as follows.
Similarly, the maximum permissible data frame length can be calculated as follows.
Therefore, the minimum receivable baud rate at the transmission destination is as follows.
The permissible baud rate error between UART6 and the transmission destination can be calculated from the
above minimum and maximum baud rate expressions, as follows.
Remarks 1. The permissible error of reception depends on the number of bits in one frame, input clock
10
11
8
20
50
100
255
Minimum permissible data frame length: FLmin = 11
Division Ratio (k)
FLmax = 11
FLmax =
BRmax = (FLmin/11)
BRmin = (FLmax/11)
2. k: Set value of BRGC6
frequency, and division ratio (k). The higher the input clock frequency and the higher the division
ratio (k), the higher the permissible error.
21k – 2
20k
FL
Table 14-6. Maximum/Minimum Permissible Baud Rate Error
FL
k + 2
2
Maximum Permissible Baud Rate Error
k
11
1
1
CHAPTER 14 SERIAL INTERFACE UART6
=
=
FL =
21k + 2
21k
22k
20k
21k
+3.53%
+4.26%
+4.56%
+4.66%
+4.72%
2
User’s Manual U17504EJ2V0UD
2
Brate
Brate
k
2
FL
FL
k
2k
2
Minimum Permissible Baud Rate Error
FL =
21k + 2
2k
3.61%
4.31%
4.58%
4.67%
4.73%
FL