UPD78F0386GK-8EU-A Renesas Electronics America, UPD78F0386GK-8EU-A Datasheet - Page 39

• Manufacturer Part Number: UPD78F0386GK-8EU-A
• Description: MCU 96KB FLASH 5KB RAM
• Manufacturer: Renesas Electronics America
• Series: 78K0/Lx2r

Specifications of UPD78F0386GK-8EU-A

• Core Processor: 78K/0
• Core Size: 8-Bit
• Speed: 20MHz
• Connectivity: 3-Wire SIO, I²C, LIN, UART/USART
• Peripherals: LCD, LVD, POR, PWM, WDT
• Number Of I /o: 26
• Program Memory Size: 96KB (96K x 8)
• Program Memory Type: FLASH
• Ram Size: 5K x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 5.5 V
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: *
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Data Converters: -

2.2.6 P70 to P76 (port 7)
(1) Port mode
(2) Control mode
2.2.7 P120 to P124 (port 12)
potential input for external low-voltage detection, resonator for main system clock connection, resonator for subsystem
clock connection, and external clock input. The following operation modes can be specified in 1-bit units.
(1) Port mode
(2) Control mode
P70 to P76 function as a 7-bit I/O port. These pins also function as key interrupt input pins.
The following operation modes can be specified in 1-bit units.
P120 to P124 function as a 5-bit I/O port. These pins also function as pins for external interrupt request input,
P70 to P76 function as a 7-bit I/O port. P70 to P76 can be set to input or output port in 1-bit units using port
mode register 7 (PM7). Use of an on-chip pull-up resistor can be specified by pull-up resistor option register 7
(PU7).
P70 to P76 function as key interrupt input pins.
P120 to P124 function as a 5-bit I/O port. P120 to P124 can be set to input or output port using port mode
register 12 (PM12). Only for P120, use of an on-chip pull-up resistor can be specified by pull-up resistor option
register 12 (PU12).
P120 to P124 function as an external interrupt request input, potential input for external low-voltage detection,
resonator for main system clock connection, resonator for subsystem clock connection, and external clock input.
(a) INTP0
(b) EXLVI
(c) X1, X2
(d) EXCLK
(e) XT1, XT2
(f) EXCLKS
This functions as an external interrupt request input (INTP0) for which the valid edge (rising edge, falling
edge, or both rising and falling edges) can be specified.
This is a potential input pin for external low-voltage detection.
These are the pins for connecting a resonator for main system clock.
This is an external clock input pin for main system clock.
These are the pins for connecting a resonator for subsystem clock.
This is an external clock input pin for subsystem clock.
Remark X1 and X2 of the PD78F0376D and 78F0386D can be used as on-chip debug mode setting pins
(OCD0A, OCD0B) when the on-chip debug function is used. For details, see CHAPTER 27 ON-
CHIP DEBUG FUNCTION ( PD78F0376D AND 78F0386D ONLY).
CHAPTER 2 PIN FUNCTIONS
User’s Manual U17504EJ2V0UD
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