UPD78F0386GK-8EU-A Renesas Electronics America, UPD78F0386GK-8EU-A Datasheet - Page 308

• Manufacturer Part Number: UPD78F0386GK-8EU-A
• Description: MCU 96KB FLASH 5KB RAM
• Manufacturer: Renesas Electronics America
• Series: 78K0/Lx2r

Specifications of UPD78F0386GK-8EU-A

• Core Processor: 78K/0
• Core Size: 8-Bit
• Speed: 20MHz
• Connectivity: 3-Wire SIO, I²C, LIN, UART/USART
• Peripherals: LCD, LVD, POR, PWM, WDT
• Number Of I /o: 26
• Program Memory Size: 96KB (96K x 8)
• Program Memory Type: FLASH
• Ram Size: 5K x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 5.5 V
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: *
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Data Converters: -

(4) Clock selection register 6 (CKSR6)
306
Address: FF56H After reset: 00H R/W
Remark CKSR6 can be refreshed (the same value is written) by software during a communication operation
Note Note the following points when selecting the TM50 output as the base clock.
Caution Make sure POWER6 = 0 when rewriting TPS63 to TPS60.
Remarks 1. f
Symbol
CKSR6
This register selects the base clock of serial interface UART6.
CKSR6 can be set by an 8-bit memory manipulation instruction.
Reset signal generation sets this register to 00H.
It is not necessary to enable the TO50 pin as a timer output pin in any mode.
Mode in which the count clock is cleared and started upon a match of TM50 and CR50 (TMC506 = 0)
Start the operation of 8-bit timer/event counter 50 first and then enable the timer F/F inversion operation
(TMC501 = 1).
PWM mode (TMC506 = 1)
Start the operation of 8-bit timer/event counter 50 first and then set the count clock to make the duty =
50%.
(when bit 7 (POWER6) and bit 6 (TXE6) of ASIM6 = 1 or bit 7 (POWER6) and bit 5 (RXE6) of ASIM6 =
1).
2. TMC506: Bit 6 of 8-bit timer mode control register 50 (TMC50)
TPS63
TMC501: Bit 1 of TMC50
PRS
7
0
0
0
0
0
0
0
0
0
1
1
1
1
: Peripheral hardware clock frequency
Figure 14-8. Format of Clock Selection Register 6 (CKSR6)
TPS62
Other than above
6
0
0
0
0
0
1
1
1
1
0
0
0
0
CHAPTER 14 SERIAL INTERFACE UART6
TPS61
5
0
0
0
1
1
0
0
1
1
0
0
1
1
User’s Manual U17504EJ2V0UD
TPS60
4
0
0
1
0
1
0
1
0
1
0
1
0
1
f
f
f
f
f
f
f
f
f
f
f
TM50 output
Setting prohibited
PRS
PRS
PRS
PRS
PRS
PRS
PRS
PRS
PRS
PRS
PRS
TPS63
/2
/2
/2
/2
/2
/2
/2
/2
/2
/2
2
3
4
5
6
7
8
9
10
3
2 MHz
1 MHz
500 kHz
250 kHz
125 kHz
62.5 kHz
31.25 kHz 78.13 kHz 156.25 kHz 312.5 kHz
15.625 kHz 39.06 kHz 78.13 kHz 156.25 kHz
7.813 kHz 19.53 kHz 39.06 kHz 78.13 kHz
3.906 kHz 9.77 kHz
1.953 kHz 4.88 kHz
2 MHz
f
PRS
Note
Base clock (f
=
TPS62
2
5 MHz
2.5 MHz
1.25 MHz
625 kHz
312.5 kHz 625 kHz
156.25 kHz 312.5 kHz 625 kHz
5 MHz
f
PRS
XCLK6
=
) selection
TPS61
10 MHz
5 MHz
2.5 MHz
1.25 MHz
19.53 kHz 39.06 kHz
9.77 kHz
1
10 MHz
f
PRS
=
20 MHz
10 MHz
5 MHz
2.5 MHz
1.25 MHz
19.53 kHz
TPS60
20 MHz
f
PRS
0
=