ATTINY167-15XD Atmel, ATTINY167-15XD Datasheet - Page 111

• Manufacturer Part Number: ATTINY167-15XD
• Description: MCU AVR 16K FLASH 15MHZ 20-TSSOP
• Manufacturer: Atmel
• Series: AVR® ATtinyr

Specifications of ATTINY167-15XD

• Core Processor: AVR
• Core Size: 8-Bit
• Speed: 16MHz
• Connectivity: I²C, LIN, SPI, UART/USART, USI
• Peripherals: Brown-out Detect/Reset, POR, PWM, Temp Sensor, WDT
• Number Of I /o: 16
• Program Memory Size: 16KB (8K x 16)
• Program Memory Type: FLASH
• Eeprom Size: 512 x 8
• Ram Size: 512 x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Data Converters: A/D 11x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 150°C
• Package / Case: 20-TSSOP
• Processor Series: ATTINY1x
• Core: AVR8
• Data Bus Width: 8 bit
• Data Ram Size: 512 B
• Maximum Clock Frequency: 16 MHz
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: EWAVR, EWAVR-BL
• Development Tools By Supplier: ATAVRDRAGON, ATSTK500, ATSTK600, ATAVRISP2, ATAVRONEKIT
• Minimum Operating Temperature: - 40 C
• For Use With: ATSTK600-SOIC - STK600 SOCKET/ADAPTER FOR SOIC
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

12.2.1
7728G–AVR–06/10
Registers
Figure 12-1. 16-bit Timer/Counter1 Block Diagram
Note:
The Timer/Counter (TCNT1), Output Compare Registers (OCR1A/B), and Input Capture Reg-
ister (ICR1) are all 16-bit registers. Special procedures must be followed when accessing the
16-bit registers. These procedures are described in the section
on page
no CPU access restrictions. Interrupt requests (abbreviated to Int.Req. in the figure) signals
are all visible in the Timer Interrupt Flag Register (TIFR1). All interrupts are individually
masked with the Timer Interrupt Mask Register (TIMSK1). TIFR1 and TIMSK1 are not shown
in the figure.
1. Refer to
112. The Timer/Counter Control Registers (TCCR1A/B) are 8-bit registers and have
Timer/Counter1 pin placement and description.
Timer/Counter
TCCRnA
OCRnB
OCRnA
TCNTn
ICRn
Figure 1-2 on page
=
=
Direction
Count
Clear
TOP
5,
Control Logic
Table 9-6 on page
TCCRnB
=
Values
BOTTOM
Fixed
TOP
ICFn (Int.Req.)
clk
Detector
Edge
=
Tn
(1)
0
ATtiny87/ATtiny167
81, and
TCCRnC
OCFnA
(Int.Req.)
OCFnB
(Int.Req.)
Table 9-3 on page 76
TOVn
(Int.Req.)
Clock Select
Generation
Generation
“Accessing 16-bit Registers”
( From Prescaler )
Waveform
Waveform
Canceler
Detector
Noise
( From Analog Comparator Ouput )
Edge
for
OCnAX
OCnBW
OCnBX
OCnAU
OCnAV
OCnAW
OCnBU
OCnBV
ICPn
Tn
111