ATTINY167-15XD Atmel, ATTINY167-15XD Datasheet - Page 163

MCU AVR 16K FLASH 15MHZ 20-TSSOP

ATTINY167-15XD

Manufacturer Part Number
ATTINY167-15XD
Description
MCU AVR 16K FLASH 15MHZ 20-TSSOP
Manufacturer
Atmel
Series
AVR® ATtinyr
Datasheet

Specifications of ATTINY167-15XD

Core Processor
AVR
Core Size
8-Bit
Speed
16MHz
Connectivity
I²C, LIN, SPI, UART/USART, USI
Peripherals
Brown-out Detect/Reset, POR, PWM, Temp Sensor, WDT
Number Of I /o
16
Program Memory Size
16KB (8K x 16)
Program Memory Type
FLASH
Eeprom Size
512 x 8
Ram Size
512 x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 11x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 150°C
Package / Case
20-TSSOP
Processor Series
ATTINY1x
Core
AVR8
Data Bus Width
8 bit
Data Ram Size
512 B
Maximum Clock Frequency
16 MHz
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
EWAVR, EWAVR-BL
Development Tools By Supplier
ATAVRDRAGON, ATSTK500, ATSTK600, ATAVRISP2, ATAVRONEKIT
Minimum Operating Temperature
- 40 C
For Use With
ATSTK600-SOIC - STK600 SOCKET/ADAPTER FOR SOIC
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
15.3
15.3.1
15.3.2
7728G–AVR–06/10
LIN Protocol
Master and Slave
Frames
BREAK
Break Delimiter
Field
HEADER
A LIN cluster consists of one master task and several slave tasks. A master node contains the
master task as well as a slave task. All other nodes contain a slave task only.
Figure 15-1. LIN cluster with one master node and “n” slave nodes
The master task decides when and which frame shall be transferred on the bus. The slave
tasks provide the data transported by each frame. Both the master task and the slave task are
parts of the Frame handler
A frame consists of a header (provided by the master task) and a response (provided by a
slave task).
The header consists of a BREAK and SYNC pattern followed by a PROTECTED IDENTIFIER.
The identifier uniquely defines the purpose of the frame. The slave task appointed for provid-
ing the response associated with the identifier transmits it. The response consists of a DATA
field and a CHECKSUM field.
Figure 15-2. Master and slave tasks behavior in LIN frame
The slave tasks waiting for the data associated with the identifier receives the response and
uses the data transported after verifying the checksum.
Figure 15-3. Structure of a LIN frame
Slave Task 1
Slave Task 2
SYNC
Master Task
Field
master node
master task
slave task
PROTECTED
IDENTIFIER
HEADER
Response Space
Field
FRAME SLOT
RESPONSE
DATA-0
slave node
slave task
LIN bus
Field
1
RESPONSE
Each byte field is transmitted as a serial byte, LSB first.
DATA-n
ATtiny87/ATtiny167
HEADER
Inter-Byte Space
Field
slave node
slave task
CHECKSUM
n
RESPONSE
Field
Inter-Frame Space
163

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