ATTINY167-15XD Atmel, ATTINY167-15XD Datasheet - Page 183

MCU AVR 16K FLASH 15MHZ 20-TSSOP

ATTINY167-15XD

Manufacturer Part Number
ATTINY167-15XD
Description
MCU AVR 16K FLASH 15MHZ 20-TSSOP
Manufacturer
Atmel
Series
AVR® ATtinyr
Datasheet

Specifications of ATTINY167-15XD

Core Processor
AVR
Core Size
8-Bit
Speed
16MHz
Connectivity
I²C, LIN, SPI, UART/USART, USI
Peripherals
Brown-out Detect/Reset, POR, PWM, Temp Sensor, WDT
Number Of I /o
16
Program Memory Size
16KB (8K x 16)
Program Memory Type
FLASH
Eeprom Size
512 x 8
Ram Size
512 x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 11x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 150°C
Package / Case
20-TSSOP
Processor Series
ATTINY1x
Core
AVR8
Data Bus Width
8 bit
Data Ram Size
512 B
Maximum Clock Frequency
16 MHz
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
EWAVR, EWAVR-BL
Development Tools By Supplier
ATAVRDRAGON, ATSTK500, ATSTK600, ATAVRISP2, ATAVRONEKIT
Minimum Operating Temperature
- 40 C
For Use With
ATSTK600-SOIC - STK600 SOCKET/ADAPTER FOR SOIC
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
15.6.3
15.6.4
7728G–AVR–06/10
LIN Enable Interrupt Register - LINENIR
LIN Error Register - LINERR
• Bit 0 - LRXOK: Receive Performed Interrupt
• Bits 7:4 - Reserved Bits
• Bit 3 - LENERR: Enable Error Interrupt
• Bit 2 - LENIDOK: Enable Identifier Interrupt
• Bit 1 - LENTXOK: Enable Transmit Performed Interrupt
• Bit 0 - LENRXOK: Enable Receive Performed Interrupt
• Bit 7 - LABORT: Abort Flag
Initial Value
Read/Write
Initial Value
Read/Write
LINENIR.
These bits are reserved for future use. For compatibility with future devices, they must be
written to zero when LINENIR is written.
Bit
Bit
– 0 = No Rx
– 1 = Rx Response complete.
– 0 = Error interrupt masked,
– 1 = Error interrupt enabled.
– 0 = Identifier interrupt masked,
– 1 = Identifier interrupt enabled.
– 0 = Transmit performed interrupt masked,
– 1 = Transmit performed interrupt enabled.
– 0 = Receive performed interrupt masked,
– 1 = Receive performed interrupt enabled.
– 0 = No warning,
– 1 = LIN abort command occurred.
This bit generates an interrupt if its respective enable bit - LENRXOK - is set in
The user clears this bit by writing 1, in order to reset this interrupt.
In UART mode, this bit is also cleared by reading LINDAT.
This bit is cleared when LERR bit in LINSIR is cleared.
LABORT
R
7
0
-
R
7
0
LTOERR
R
6
0
-
R
6
0
R
5
0
LOVERR
-
R
5
0
R
4
0
-
LFERR
R
4
0
LENERR
R/W
3
0
LSERR
R
3
0
LENIDOK
ATtiny87/ATtiny167
R/W
2
0
LPERR
R
2
0
LENTXOK
R/W
LCERR
1
0
R
1
0
LENRXOK LINENIR
LBERR
R/W
0
0
R
0
0
LINERR
183

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