ATTINY167-15XD Atmel, ATTINY167-15XD Datasheet - Page 33

• Manufacturer Part Number: ATTINY167-15XD
• Description: MCU AVR 16K FLASH 15MHZ 20-TSSOP
• Manufacturer: Atmel
• Series: AVR® ATtinyr

Specifications of ATTINY167-15XD

• Core Processor: AVR
• Core Size: 8-Bit
• Speed: 16MHz
• Connectivity: I²C, LIN, SPI, UART/USART, USI
• Peripherals: Brown-out Detect/Reset, POR, PWM, Temp Sensor, WDT
• Number Of I /o: 16
• Program Memory Size: 16KB (8K x 16)
• Program Memory Type: FLASH
• Eeprom Size: 512 x 8
• Ram Size: 512 x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Data Converters: A/D 11x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 150°C
• Package / Case: 20-TSSOP
• Processor Series: ATTINY1x
• Core: AVR8
• Data Bus Width: 8 bit
• Data Ram Size: 512 B
• Maximum Clock Frequency: 16 MHz
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: EWAVR, EWAVR-BL
• Development Tools By Supplier: ATAVRDRAGON, ATSTK500, ATSTK600, ATAVRISP2, ATAVRONEKIT
• Minimum Operating Temperature: - 40 C
• For Use With: ATSTK600-SOIC - STK600 SOCKET/ADAPTER FOR SOIC
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

4.3.4
4.3.5
4.3.6
4.3.7
7728G–AVR–06/10
COUT Command
Clock Availability
System Clock Source Recovering
Clock Switching
Clock Source’ command. This will indicate via the CLKRDY bit in the CLKCSR register that a
valid clock source is available and operational.
The ‘Disable Clock Source’ command disables the clock source indicated by the settings of
CLKSELR register (only CSEL3..0). If the clock source indicated is currently the one that is
used to drive the system clock, the command is not executed.
Because the selected configuration is latched at clock source level, it is possible to enable
many clock sources at a given time (ex: the internal RC oscillator for system clock + an oscilla-
tor with external crystal). The user (code) is responsible of this management.
The ‘CKOUT ’ command allows to drive the CLKO pin. Refer to
Buffer” on page 31
‘Request for Clock Availability’ command enables a hardware oscillation cycle counter driven
by the selected source clock, CSEL3..0. The count limit value is determined by the settings of
CSUT1..0. The clock is declared ready (CLKRDY = 1) when the count limit value is reached.
The CLKRDY flag is reset when the count starts. Once set, this flag remains unchanged until a
new count is commanded. To perform this checking, the CKSEL and CSUT fields should not
be changed while the operation is running.
Note that once the new clock source is selected (‘Enable Clock Source’ command), the count
procedure is automatically started. The user (code) should wait for the setting of the CLKRDY
flag in CLKSCR register before using a newly selected clock.
At any time, the user (code) can ask for the availability of a clock source. The user (code) can
request it by writing the ‘Request for Clock Availability ’ command in the CLKSCR register. A
full polling of the status of clock sources can thus be done.
The ‘Recover System Clock Source’ command returns the current clock source used to drive
the system clock as per
updated with this returned value. There is no information on the SUT used or status on
CKOUT.
To drive the system clock, the user can switch from the current clock source to any other of the
following ones (one of them being the current clock source):
The clock switching is performed by a sequence of commands. First, the user (code) must
make sure that the new clock source is operating. Then the ‘Clock Source Switching’ com-
mand can be issued. Once this command has been successfully completed using the
‘Recover System Clock Source’ command, the user (code) may stop the previous clock
source.
1. Calibrated internal RC oscillator 8.0 MHz,
2. Internal watchdog oscillator 128 kHz,
3. External clock,
4. External low-frequency oscillator,
5. External Crystal/Ceramic Resonator.
for using.
Table 4-1 on page
25. The CKSEL field of CLKSELR register is then
ATtiny87/ATtiny167
Section 4.2.7 “Clock Output
33