ATTINY167-15XD Atmel, ATTINY167-15XD Datasheet - Page 18

MCU AVR 16K FLASH 15MHZ 20-TSSOP

ATTINY167-15XD

Manufacturer Part Number
ATTINY167-15XD
Description
MCU AVR 16K FLASH 15MHZ 20-TSSOP
Manufacturer
Atmel
Series
AVR® ATtinyr
Datasheet

Specifications of ATTINY167-15XD

Core Processor
AVR
Core Size
8-Bit
Speed
16MHz
Connectivity
I²C, LIN, SPI, UART/USART, USI
Peripherals
Brown-out Detect/Reset, POR, PWM, Temp Sensor, WDT
Number Of I /o
16
Program Memory Size
16KB (8K x 16)
Program Memory Type
FLASH
Eeprom Size
512 x 8
Ram Size
512 x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 11x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 150°C
Package / Case
20-TSSOP
Processor Series
ATTINY1x
Core
AVR8
Data Bus Width
8 bit
Data Ram Size
512 B
Maximum Clock Frequency
16 MHz
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
EWAVR, EWAVR-BL
Development Tools By Supplier
ATAVRDRAGON, ATSTK500, ATSTK600, ATAVRISP2, ATAVRONEKIT
Minimum Operating Temperature
- 40 C
For Use With
ATSTK600-SOIC - STK600 SOCKET/ADAPTER FOR SOIC
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
3.3.1
3.3.2
3.3.3
3.3.4
3.3.5
18
ATtiny87/ATtiny167
EEPROM Read/Write Access
Atomic Byte Programming
Split Byte Programming
Erase
Write
The EEPROM Access Registers are accessible in the I/O space.
The write access times for the EEPROM are given in
ever, lets the user software detect when the next byte can be written. If the user code contains
instructions that write the EEPROM, some precautions must be taken. In heavily filtered power
supplies, Vcc is likely to rise or fall slowly on Power-up/down. This causes the device for some
period of time to run at a voltage lower than specified as minimum for the clock frequency
used. See
in these situations.
In order to prevent unintentional EEPROM writes, a specific write procedure must be followed.
Refer to
details on this.
When the EEPROM is read, the CPU is halted for four clock cycles before the next instruction
is executed. When the EEPROM is written, the CPU is halted for two clock cycles before the
next instruction is executed.
Using Atomic Byte Programming is the simplest mode. When writing a byte to the EEPROM,
the user must write the address into the EEARL Register and data into EEDR Register. If the
EEPMn bits are zero, writing EEPE (within four cycles after EEMPE is written) will trigger the
erase/write operation. Both the erase and write cycle are done in one operation and the total
programming time is given in Table 1. The EEPE bit remains set until the erase and write
operations are completed. While the device is busy with programming, it is not possible to do
any other EEPROM operations.
It is possible to split the erase and write cycle in two different operations. This may be useful if
the system requires short access time for some limited period of time (typically if the power
supply voltage falls). In order to take advantage of this method, it is required that the locations
to be written have been erased before the write operation. But since the erase and write oper-
ations are split, it is possible to do the erase operations when the system allows doing
time-critical operations (typically after Power-up).
To erase a byte, the address must be written to EEAR. If the EEPMn bits are 0b01, writing the
EEPE (within four cycles after EEMPE is written) will trigger the erase operation only (pro-
gramming time is given in Table 1). The EEPE bit remains set until the erase operation
completes. While the device is busy programming, it is not possible to do any other EEPROM
operations.
To write a location, the user must write the address into EEAR and the data into EEDR. If the
EEPMn bits are 0b10, writing the EEPE (within four cycles after EEMPE is written) will trigger
the write operation only (programming time is given in Table 1). The EEPE bit remains set until
the write operation completes. If the location to be written has not been erased before write,
the data that is stored must be considered as lost. While the device is busy with programming,
it is not possible to do any other EEPROM operations.
“Atomic Byte Programming” on page 18
“Preventing EEPROM Corruption” on page 20
and
“Split Byte Programming” on page 18
Table
for details on how to avoid problems
3-2. A self-timing function, how-
7728G–AVR–06/10
for

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