OM13006,598 NXP Semiconductors, OM13006,598 Datasheet - Page 100

• Manufacturer Part Number: OM13006,598
• Description: BOARD EVAL EM773 METER EU PLUG
• Manufacturer: NXP Semiconductors
• Type: Other Power Managementr

Specifications of OM13006,598

• Design Resources: Plug Meter Schematics, Gerber Files USB Dongle Schematics, Gerber Files
• Main Purpose: Power Management, Energy/Power Meter
• Embedded: Yes, MCU, 32-Bit
• Utilized Ic / Part: EM773FHN33,551
• Interface Type: USB
• Maximum Operating Temperature: + 150 C
• Operating Supply Voltage: 1.8 V to 3.6 V
• Product: Power Management Development Tools
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Primary Attributes: -
• Secondary Attributes: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant
• For Use With/related Products: EM773, OL2381
• Other names: 568-6681

NXP Semiconductors
Table 112. Register overview: I
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UM10415
User manual
Name
I2C0ADR1
I2C0ADR2
I2C0ADR3
I2C0DATA_
BUFFER
I2C0MASK0
I2C0MASK1
I2C0MASK2
I2C0MASK3
Reset value reflects the data stored in used bits only. It does not include reserved bits content.
10.8.1 I
Access Address
R/W
R/W
R/W
RO
R/W
R/W
R/W
R/W
The I2CONSET registers control setting of bits in the I2CON register that controls
operation of the I
corresponding bit in the I
Table 113. I
Bit
1:0
2
3
4
5
6
31:7 -
2
offset
0x020
0x024
0x028
0x02C
0x030
0x034
0x038
0x03C
C Control Set register (I2C0CONSET - 0x4000 0000)
Symbol
-
AA
SI
STO
STA
I2EN
2
C (base address 0x4000 0000)
2
C Control Set register (I2C0CONSET - address 0x4000 0000) bit description
Description
I2C Slave Address Register 1. Contains the 7-bit slave address for
operation of the I
mode. The least significant bit determines whether a slave responds to
the General Call address.
I2C Slave Address Register 2. Contains the 7-bit slave address for
operation of the I
mode. The least significant bit determines whether a slave responds to
the General Call address.
I2C Slave Address Register 3. Contains the 7-bit slave address for
operation of the I
mode. The least significant bit determines whether a slave responds to
the General Call address.
Data buffer register. The contents of the 8 MSBs of the I2DAT shift
register will be transferred to the DATA_BUFFER automatically after
every nine bits (8 bits of data plus ACK or NACK) has been received on
the bus.
I2C Slave address mask register 0. This mask register is associated
with I2ADR0 to determine an address match. The mask register has no
effect when comparing to the General Call address (‘0000000’).
I2C Slave address mask register 1. This mask register is associated
with I2ADR0 to determine an address match. The mask register has no
effect when comparing to the General Call address (‘0000000’).
I2C Slave address mask register 2. This mask register is associated
with I2ADR0 to determine an address match. The mask register has no
effect when comparing to the General Call address (‘0000000’).
I2C Slave address mask register 3. This mask register is associated
with I2ADR0 to determine an address match. The mask register has no
effect when comparing to the General Call address (‘0000000’).
All information provided in this document is subject to legal disclaimers.
Description
Reserved. User software should not write ones to reserved bits. The
value read from a reserved bit is not defined.
Assert acknowledge flag.
I
STOP flag.
START flag.
I
Reserved. The value read from a reserved bit is not defined.
2
2
2
C interrupt flag.
C interface enable.
C interface. Writing a one to a bit of this register causes the
Rev. 1 — 10 September 2010
2
C control register to be set. Writing a zero has no effect.
2
2
2
C interface in slave mode, and is not used in master
C interface in slave mode, and is not used in master
C interface in slave mode, and is not used in master
…continued
Chapter 10: EM773 I2C-bus interface
UM10415
© NXP B.V. 2010. All rights reserved.
Reset
value
NA
0
0
0
0
-
Reset
value
0x00
0x00
0x00
0x00
0x00
0x00
0x00
0x00
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