OM13006,598 NXP Semiconductors, OM13006,598 Datasheet - Page 122

• Manufacturer Part Number: OM13006,598
• Description: BOARD EVAL EM773 METER EU PLUG
• Manufacturer: NXP Semiconductors
• Type: Other Power Managementr

Specifications of OM13006,598

• Design Resources: Plug Meter Schematics, Gerber Files USB Dongle Schematics, Gerber Files
• Main Purpose: Power Management, Energy/Power Meter
• Embedded: Yes, MCU, 32-Bit
• Utilized Ic / Part: EM773FHN33,551
• Interface Type: USB
• Maximum Operating Temperature: + 150 C
• Operating Supply Voltage: 1.8 V to 3.6 V
• Product: Power Management Development Tools
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Primary Attributes: -
• Secondary Attributes: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant
• For Use With/related Products: EM773, OL2381
• Other names: 568-6681

NXP Semiconductors
UM10415
User manual
10.11.3 Slave Receiver mode
In the slave receiver mode, a number of data bytes are received from a master transmitter
(see
follows:
Table 131. I2C0ADR and I2C1ADR usage in Slave Receiver mode
The upper 7 bits are the address to which the I
master. If the LSB (GC) is set, the I
(0x00); otherwise it ignores the General Call address.
Table 132. I2C0CONSET and I2C1CONSET used to initialize Slave Receiver mode
The I
to logic 1 to enable the I
acknowledge its own slave address or the General Call address. STA, STO, and SI must
be reset.
When I2ADR and I2CON have been initialized, the I
its own slave address followed by the data direction bit which must be “0” (W) for the I
block to operate in the slave receiver mode. After its own slave address and the W bit
have been received, the serial interrupt flag (SI) is set and a valid status code can be read
from I2STAT. This status code is used to vector to a state service routine. The appropriate
action to be taken for each of these status codes is detailed in
receiver mode may also be entered if arbitration is lost while the I
mode (see status 0x68 and 0x78).
If the AA bit is reset during a transfer, the I
to SDA after the next received data byte. While AA is reset, the I
respond to its own slave address or a General Call address. However, the I
monitored and address recognition may be resumed at any time by setting AA. This
means that the AA bit may be used to temporarily isolate the I
Bit
Symbol
Bit
Symbol
Value
Figure
2
C-bus rate settings do not affect the I
7
7
-
-
25). To initiate the slave receiver mode, I2ADR and I2CON must be loaded as
All information provided in this document is subject to legal disclaimers.
6
6
I2EN
1
Rev. 1 — 10 September 2010
2
C block. The AA bit must be set to enable the I
5
5
STA
0
own slave 7-bit address
2
C block will respond to the General Call address
4
4
STO
0
2
C block will return a not acknowledge (logic 1)
2
C block in the slave mode. I2EN must be set
2
C block will respond when addressed by a
Chapter 10: EM773 I2C-bus interface
3
3
SI
0
2
C block waits until it is addressed by
2
2
AA
1
2
Table
C block from the I
2
2
C block does not
C block is in the master
133. The slave
UM10415
-
1
1
-
© NXP B.V. 2010. All rights reserved.
2
C block to
2
C-bus is still
0
GC
0
-
-
2
122 of 310
C-bus.
2
C