OM13006,598 NXP Semiconductors, OM13006,598 Datasheet - Page 304

• Manufacturer Part Number: OM13006,598
• Description: BOARD EVAL EM773 METER EU PLUG
• Manufacturer: NXP Semiconductors
• Type: Other Power Managementr

Specifications of OM13006,598

• Design Resources: Plug Meter Schematics, Gerber Files USB Dongle Schematics, Gerber Files
• Main Purpose: Power Management, Energy/Power Meter
• Embedded: Yes, MCU, 32-Bit
• Utilized Ic / Part: EM773FHN33,551
• Interface Type: USB
• Maximum Operating Temperature: + 150 C
• Operating Supply Voltage: 1.8 V to 3.6 V
• Product: Power Management Development Tools
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Primary Attributes: -
• Secondary Attributes: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant
• For Use With/related Products: EM773, OL2381
• Other names: 568-6681

NXP Semiconductors
Chapter 10: EM773 I2C-bus interface
10.1
10.2
10.3
10.4
10.5
10.5.1
10.6
10.7
10.8
10.8.1
10.8.2
10.8.3
10.8.4
10.8.5
10.8.5.1
10.8.6
10.8.7
10.8.7.1
10.8.7.2
10.8.8
10.8.9
10.8.10
10.9
10.9.1
10.9.2
10.9.3
10.9.4
10.10
10.10.1
10.10.2
10.10.3
10.10.4
10.10.5
10.10.6
10.10.7
10.10.8
10.10.9
10.10.10 Status decoder and status register . . . . . . . . 114
UM10415
User manual
How to read this chapter . . . . . . . . . . . . . . . . . 97
Basic configuration . . . . . . . . . . . . . . . . . . . . . 97
Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 97
Applications . . . . . . . . . . . . . . . . . . . . . . . . . . . 97
General description . . . . . . . . . . . . . . . . . . . . . 97
Pin description . . . . . . . . . . . . . . . . . . . . . . . . . 99
Clocking and power control . . . . . . . . . . . . . . 99
Register description . . . . . . . . . . . . . . . . . . . . 99
I
I
2
2
C operating modes . . . . . . . . . . . . . . . . . . . 107
C implementation and operation . . . . . . . . 110
94
RS-485/EIA-485 Auto Address Detection (AAD)
mode. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .94
RS-485/EIA-485 Auto Direction Control . . . . . .94
I
I
0x4000 0000) . . . . . . . . . . . . . . . . . . . . . . . . 100
I
102
I
I
0x4000 000C) . . . . . . . . . . . . . . . . . . . . . . . . 102
I
(I2C0SCLH - 0x4000 0010 and I2C0SCLL-
0x4000 0014) . . . . . . . . . . . . . . . . . . . . . . . . 103
Selecting the appropriate I
cycle . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 103
I
0x4000 0018) . . . . . . . . . . . . . . . . . . . . . . . . 104
I
- 0x4000 001C) . . . . . . . . . . . . . . . . . . . . . . . 104
Interrupt in Monitor mode . . . . . . . . . . . . . . . 105
Loss of arbitration in Monitor mode . . . . . . . 106
I
0x4000 00[20, 24, 28]) . . . . . . . . . . . . . . . . . 106
I
0x4000 002C) . . . . . . . . . . . . . . . . . . . . . . . . 106
I
0x4000 00[30, 34, 38, 3C]) . . . . . . . . . . . . . . 107
Master Transmitter mode . . . . . . . . . . . . . . . 107
Master Receiver mode . . . . . . . . . . . . . . . . . 108
Slave Receiver mode . . . . . . . . . . . . . . . . . . 109
Slave Transmitter mode . . . . . . . . . . . . . . . . 110
Input filters and output stages. . . . . . . . . . . . 111
Address Registers, I2ADDR0 to I2ADDR3 . . 112
Address mask registers, I2MASK0 to I2MASK3. .
112
Comparator. . . . . . . . . . . . . . . . . . . . . . . . . . 112
Shift register, I2DAT . . . . . . . . . . . . . . . . . . . 112
Arbitration and synchronization logic . . . . . . 112
Serial clock generator . . . . . . . . . . . . . . . . . . 113
Timing and control . . . . . . . . . . . . . . . . . . . . 114
Control register, I2CONSET and I2CONCLR 114
2
2
2
2
2
2
2
2
2
2
2
C Fast-mode Plus . . . . . . . . . . . . . . . . . . . . 98
C Control Set register (I2C0CONSET -
C Status register (I2C0STAT - 0x4000 0004) . . .
C Data register (I2C0DAT - 0x4000 0008) . 102
C Slave Address register 0 (I2C0ADR0-
C SCL HIGH and LOW duty cycle registers
C Control Clear register (I2C0CONCLR -
C Monitor mode control register (I2C0MMCTRL
C Slave Address registers (I2C0ADR[1, 2, 3] -
C Data buffer register (I2C0DATA_BUFFER -
C Mask registers (I2C0MASK[0, 1, 2, 3] -
2
C data rate and duty
All information provided in this document is subject to legal disclaimers.
Rev. 1 — 10 September 2010
9.7
10.11
10.11.1
10.11.2
10.11.3
10.11.4
10.11.5
10.11.5.1 I2STAT = 0xF8 . . . . . . . . . . . . . . . . . . . . . . . 128
10.11.5.2 I2STAT = 0x00 . . . . . . . . . . . . . . . . . . . . . . . 128
10.11.6
10.11.6.1 Simultaneous Repeated START conditions from
10.11.6.2 Data transfer after loss of arbitration . . . . . . 130
10.11.6.3 Forced access to the I
10.11.6.4 I
10.11.6.5 Bus error . . . . . . . . . . . . . . . . . . . . . . . . . . . 131
10.11.7
10.11.8
10.11.9
10.11.10 The state service routines . . . . . . . . . . . . . . 132
10.11.11 Adapting state services to an application. . . 132
10.12
10.12.1
10.12.2
10.12.3
10.12.4
10.12.5
10.12.5.1 State: 0x00 . . . . . . . . . . . . . . . . . . . . . . . . . . 133
10.12.5.2 Master States . . . . . . . . . . . . . . . . . . . . . . . . 133
10.12.5.3 State: 0x08 . . . . . . . . . . . . . . . . . . . . . . . . . . 133
10.12.5.4 State: 0x10 . . . . . . . . . . . . . . . . . . . . . . . . . . 134
10.12.6
10.12.6.1 State: 0x18 . . . . . . . . . . . . . . . . . . . . . . . . . . 134
10.12.6.2 State: 0x20 . . . . . . . . . . . . . . . . . . . . . . . . . . 134
10.12.6.3 State: 0x28 . . . . . . . . . . . . . . . . . . . . . . . . . . 134
10.12.6.4 State: 0x30 . . . . . . . . . . . . . . . . . . . . . . . . . . 135
10.12.6.5 State: 0x38 . . . . . . . . . . . . . . . . . . . . . . . . . . 135
10.12.7
10.12.7.1 State: 0x40 . . . . . . . . . . . . . . . . . . . . . . . . . . 135
10.12.7.2 State: 0x48 . . . . . . . . . . . . . . . . . . . . . . . . . . 135
10.12.7.3 State: 0x50 . . . . . . . . . . . . . . . . . . . . . . . . . . 135
10.12.7.4 State: 0x58 . . . . . . . . . . . . . . . . . . . . . . . . . . 136
10.12.8
10.12.8.1 State: 0x60 . . . . . . . . . . . . . . . . . . . . . . . . . . 136
10.12.8.2 State: 0x68 . . . . . . . . . . . . . . . . . . . . . . . . . . 136
10.12.8.3 State: 0x70 . . . . . . . . . . . . . . . . . . . . . . . . . . 136
10.12.8.4 State: 0x78 . . . . . . . . . . . . . . . . . . . . . . . . . . 137
10.12.8.5 State: 0x80 . . . . . . . . . . . . . . . . . . . . . . . . . . 137
10.12.8.6 State: 0x88 . . . . . . . . . . . . . . . . . . . . . . . . . . 137
10.12.8.7 State: 0x90 . . . . . . . . . . . . . . . . . . . . . . . . . . 137
10.12.8.8 State: 0x98 . . . . . . . . . . . . . . . . . . . . . . . . . . 138
Chapter 21: EM773 Supplementary information
Architecture . . . . . . . . . . . . . . . . . . . . . . . . . . . 95
Details of I
Software example . . . . . . . . . . . . . . . . . . . . . 132
RS485/EIA-485 driver delay time. . . . . . . . . . . 94
RS485/EIA-485 output inversion . . . . . . . . . . . 95
Master Transmitter mode . . . . . . . . . . . . . . . . 115
Master Receiver mode. . . . . . . . . . . . . . . . . . 119
Slave Receiver mode. . . . . . . . . . . . . . . . . . 122
Slave Transmitter mode . . . . . . . . . . . . . . . . 126
Miscellaneous states . . . . . . . . . . . . . . . . . . 128
Some special cases . . . . . . . . . . . . . . . . . . . 129
two masters . . . . . . . . . . . . . . . . . . . . . . . . . 129
131
I
Initialization . . . . . . . . . . . . . . . . . . . . . . . . . 132
I
Initialization routine . . . . . . . . . . . . . . . . . . . 132
Start Master Transmit function . . . . . . . . . . . 132
Start Master Receive function . . . . . . . . . . . 133
I
Non mode specific states . . . . . . . . . . . . . . . 133
Master Transmitter states . . . . . . . . . . . . . . 134
Master Receive states . . . . . . . . . . . . . . . . . 135
Slave Receiver states . . . . . . . . . . . . . . . . . 136
2
2
2
2
C-bus obstructed by a LOW level on SCL or SDA
C state service routines . . . . . . . . . . . . . . . 131
C interrupt service . . . . . . . . . . . . . . . . . . . 132
C interrupt routine . . . . . . . . . . . . . . . . . . . 133
2
C operating modes . . . . . . . . . . . 114
2
C-bus. . . . . . . . . . . . 130
UM10415
© NXP B.V. 2010. All rights reserved.
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