OM13006,598 NXP Semiconductors, OM13006,598 Datasheet - Page 272

• Manufacturer Part Number: OM13006,598
• Description: BOARD EVAL EM773 METER EU PLUG
• Manufacturer: NXP Semiconductors
• Type: Other Power Managementr

Specifications of OM13006,598

• Design Resources: Plug Meter Schematics, Gerber Files USB Dongle Schematics, Gerber Files
• Main Purpose: Power Management, Energy/Power Meter
• Embedded: Yes, MCU, 32-Bit
• Utilized Ic / Part: EM773FHN33,551
• Interface Type: USB
• Maximum Operating Temperature: + 150 C
• Operating Supply Voltage: 1.8 V to 3.6 V
• Product: Power Management Development Tools
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Primary Attributes: -
• Secondary Attributes: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant
• For Use With/related Products: EM773, OL2381
• Other names: 568-6681

NXP Semiconductors
UM10415
User manual
20.4.7.2.3 Restrictions
20.4.7.2.4 Condition flags
20.4.7.2.5 Examples
20.4.7.3.1 Syntax
20.4.7.3.2 Operation
20.4.7.3.3 Restrictions
20.4.7.3.4 Condition flags
20.4.7.3.5 Examples
20.4.7.4.1 Syntax
20.4.7.4.2 Operation
20.4.7.4.3 Restrictions
20.4.7.3 DMB
20.4.7.4 DSB
There are no restrictions.
This instruction does not change the condition flags.
Data Memory Barrier.
DMB
DMB acts as a data memory barrier. It ensures that all explicit memory accesses that
appear in program order before the DMB instruction are observed before any explicit
memory accesses that appear in program order after the DMB instruction. DMB does not
affect the ordering of instructions that do not access memory.
There are no restrictions.
This instruction does not change the flags.
Data Synchronization Barrier.
DSB
DSB acts as a special data synchronization memory barrier. Instructions that come after
the DSB, in program order, do not execute until the DSB instruction completes. The DSB
instruction completes when all explicit memory accesses before it complete.
There are no restrictions.
CPSID i ; Disable all interrupts except NMI (set PRIMASK)
CPSIE i ; Enable interrupts (clear PRIMASK)
DMB ; Data Memory Barrier
All information provided in this document is subject to legal disclaimers.
Rev. 1 — 10 September 2010
Chapter 20: Appendix EM773 ARM Cortex-M0 reference
UM10415
© NXP B.V. 2010. All rights reserved.
272 of 310