OM13006,598 NXP Semiconductors, OM13006,598 Datasheet - Page 254

• Manufacturer Part Number: OM13006,598
• Description: BOARD EVAL EM773 METER EU PLUG
• Manufacturer: NXP Semiconductors
• Type: Other Power Managementr

Specifications of OM13006,598

• Design Resources: Plug Meter Schematics, Gerber Files USB Dongle Schematics, Gerber Files
• Main Purpose: Power Management, Energy/Power Meter
• Embedded: Yes, MCU, 32-Bit
• Utilized Ic / Part: EM773FHN33,551
• Interface Type: USB
• Maximum Operating Temperature: + 150 C
• Operating Supply Voltage: 1.8 V to 3.6 V
• Product: Power Management Development Tools
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Primary Attributes: -
• Secondary Attributes: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant
• For Use With/related Products: EM773, OL2381
• Other names: 568-6681

NXP Semiconductors
UM10415
User manual
20.4.4.1.2 Operation
20.4.4.1.3 Restrictions
20.4.4.1.4 Condition flags
20.4.4.1.5 Examples
20.4.4.2.1 Syntax
20.4.4.2.2 Operation
20.4.4.2 LDR and STR, immediate offset
where:
ADR generates an address by adding an immediate value to the PC, and writes the result
to the destination register.
ADR facilitates the generation of position-independent code, because the address is
PC-relative.
If you use ADR to generate a target address for a BX or BLX instruction, you must ensure
that bit[0] of the address you generate is set to 1 for correct execution.
In this instruction Rd must specify R0-R7. The data-value addressed must be word
aligned and within 1020 bytes of the current PC.
This instruction does not change the flags.
Load and Store with immediate offset.
LDR Rt, [<Rn | SP> {, #imm}]
LDR<B|H> Rt, [Rn {, #imm}]
STR Rt, [<Rn | SP>, {,#imm}]
STR<B|H> Rt, [Rn {,#imm}]
where:
LDR, LDRB and LDRH instructions load the register specified by Rt with either a word,
byte or halfword data value from memory. Sizes less than word are zero extended to
32-bits before being written to the register specified by Rt.
Rd is the destination register.
label is a PC-relative expression. See
Rt is the register to load or store.
Rn is the register on which the memory address is based.
imm is an offset from Rn. If imm is omitted, it is assumed to be zero.
ADR
ADR
R1, TextMessage
R3, [PC,#996]
All information provided in this document is subject to legal disclaimers.
Rev. 1 — 10 September 2010
Chapter 20: Appendix EM773 ARM Cortex-M0 reference
; Write address value of a location labelled as
; Set R3 to value of PC + 996.
; TextMessage to R1
Section
20–20.4.3.5.
UM10415
© NXP B.V. 2010. All rights reserved.
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