MT46V16M16P-5B:K Micron Technology Inc, MT46V16M16P-5B:K Datasheet - Page 51

DRAM Chip DDR SDRAM 256M-Bit 16Mx16 2.6V 66-Pin TSOP Tray

MT46V16M16P-5B:K

Manufacturer Part Number
MT46V16M16P-5B:K
Description
DRAM Chip DDR SDRAM 256M-Bit 16Mx16 2.6V 66-Pin TSOP Tray
Manufacturer
Micron Technology Inc
Type
DDR SDRAMr
Datasheet

Specifications of MT46V16M16P-5B:K

Density
256 Mb
Maximum Clock Rate
400 MHz
Package
66TSOP
Address Bus Width
15 Bit
Operating Supply Voltage
2.6 V
Maximum Random Access Time
0.7 ns
Operating Temperature
0 to 70 °C
Organization
16Mx16
Address Bus
15b
Access Time (max)
700ps
Operating Supply Voltage (typ)
2.6V
Package Type
TSOP
Operating Temp Range
0C to 70C
Operating Supply Voltage (max)
2.7V
Operating Supply Voltage (min)
2.5V
Supply Current
260mA
Pin Count
66
Mounting
Surface Mount
Operating Temperature Classification
Commercial
Lead Free Status / RoHS Status
Compliant

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READ
Figure 18:
PDF: 09005aef80768abb/Source: 09005aef82a95a3a
DDR_x4x8x16_Core2.fm - 256Mb DDR: Rev. O, Core DDR: Rev. B 1/09 EN
READ Command
Note:
The READ command is used to initiate a burst read access to an active row, as shown in
Figure 18 on page 49. The value on the BA0, BA1 inputs selects the bank, and the address
provided on inputs A0–Ai (where Ai is the most significant column address bit for a given
density and configuration, see Table 2 on page 2) selects the starting column location.
BA0, BA1
Address
RAS#
CAS#
WE#
CK#
CKE
CS#
A10
EN AP = enable auto precharge; DIS AP = disable auto precharge.
CK
HIGH
DIS AP
EN AP
Bank
Col
Don’t Care
49
Micron Technology, Inc., reserves the right to change products or specifications without notice.
256Mb: x4, x8, x16 DDR SDRAM
©2003 Micron Technology, Inc. All rights reserved.
Commands

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