MT46V16M16P-5B:K Micron Technology Inc, MT46V16M16P-5B:K Datasheet - Page 9

• Manufacturer Part Number: MT46V16M16P-5B:K
• Description: DRAM Chip DDR SDRAM 256M-Bit 16Mx16 2.6V 66-Pin TSOP Tray
• Manufacturer: Micron Technology Inc
• Type: DDR SDRAMr

Specifications of MT46V16M16P-5B:K

• Density: 256 Mb
• Maximum Clock Rate: 400 MHz
• Package: 66TSOP
• Address Bus Width: 15 Bit
• Operating Supply Voltage: 2.6 V
• Maximum Random Access Time: 0.7 ns
• Operating Temperature: 0 to 70 °C
• Organization: 16Mx16
• Address Bus: 15b
• Access Time (max): 700ps
• Operating Supply Voltage (typ): 2.6V
• Package Type: TSOP
• Operating Temp Range: 0C to 70C
• Operating Supply Voltage (max): 2.7V
• Operating Supply Voltage (min): 2.5V
• Supply Current: 260mA
• Pin Count: 66
• Mounting: Surface Mount
• Operating Temperature Classification: Commercial
• Lead Free Status / RoHS Status: Compliant

Figure 4:
Figure 5:
PDF: 09005aef80768abb/Source: 09005aef82a95a3a
256Mb_DDR_x4x8x16_D2.fm - 256Mb DDR: Rev. O, Core DDR: Rev. B 1/09 EN
BA0, BA1
A0–A12,
BA0, BA1
A0–A12,
RAS#
CAS#
WE#
CKE
CK#
CS#
CK
CAS#
RAS#
WE#
CKE
CK#
CS#
CK
32 Meg x 8 Functional Block Diagram
16 Meg x 16 Functional Block Diagram
15
15
ADDRESS
REGISTER
MODE REGISTERS
ADDRESS
REGISTER
MODE REGISTERS
CONTROL
LOGIC
15
CONTROL
LOGIC
15
13
COUNTER
REFRESH
13
10
2
13
9
COUNTER
REFRESH
ADDRESS
2
2
ROW-
MUX
13
ADDRESS
2
ROW-
MUX
COUNTER/
COLUMN-
CONTROL
ADDRESS
LATCH
LOGIC
13
BANK
COUNTER/
CONTROL
COLUMN-
ADDRESS
LATCH
BANK
LOGIC
13
DECODER
ADDRESS
BANK0
LATCH
ROW-
DECODER
ADDRESS
&
BANK0
LATCH
ROW-
8
1
&
9
1
8192
8192
SENSE AMPLIFIERS
(8,192 x 256 x 32)
DM MASK LOGIC
SENSE AMPLIFIERS
DM MASK LOGIC
(8192 x 512 x 16)
I/O GATING
DECODER
MEMORY
COLUMN
I/O GATING
DECODER
BANK0
ARRAY
COLUMN
MEMORY
(x32)
8192
256
BANK0
ARRAY
BANK1
(x16)
8192
512
BANK1
9
BANK2
BANK2
BANK3
BANK3
32
16
Micron Technology, Inc., reserves the right to change products or specifications without notice.
32
32
16
LATCH
READ
16
Out
CK
CK
LATCH
DRIVERS
READ
WRITE
FIFO
&
Out
16
16
CK
CK
256Mb: x4, x8, x16 DDR SDRAM
CK
DRIVERS
In
WRITE
FIFO
8
8
&
MUX
COL0
COL0
MASK
DATA
CK
In
32
4
COL0
COL0
MUX
MASK
DATA
GENERATOR
Functional Block Diagrams
16
2
2
2
16
16
REGISTERS
DQS
16
INPUT
1
1
8
8
GENERATOR
REGISTERS
INPUT
DQS
8
DATA
2
2
16
16
2
1
1
8
8
DATA
©2003 Micron Technology, Inc. All rights reserved.
2
16
DRVRS
DQS
CK
1
DLL
2
1
8
RCVRS
1
DRVRS
DQS
CK
DLL
RCVRS
DQ0–DQ15
LDQS
UDQS
LDM,
UDM
DQ0–DQ7
DQS
DM