W83C553FY-G Nuvoton Technology Corporation of America, W83C553FY-G Datasheet - Page 124

• Manufacturer Part Number: W83C553FY-G
• Manufacturer: Nuvoton Technology Corporation of America

Specifications of W83C553FY-G

• Lead Free Status / RoHS Status: Compliant

W83C553F
4.4.1
Primary/Secondary Command #1 Registers
Function:
Type:
Bit Description:
WINBOND SYSTEMS LABORATORY
Bits [7:4]:
Bit 3:
Bits [2:1]:
Bit 0:
Read/Write
Primary/Secondary Command Registers
These registers are used to control DMA data transfers to/from the two IDE ports when multi-word DMA
disk drives are used.
These bits are hardwired to 0b.
W/R#. This bit controls the bus master transfer direction. Low is PCI memory to IDE device and
high is IDE device to PCI memory. This bit must not be changed while the bus master function
is active as defined by bit 0.
These bits are hardwired to 0b.
BMEN. Bus Master operation is active when this bit is set. The bus master operation can be
terminated by writing a 0b to this bit but is considered as an abort and can not be resumed.
Writing a 1b to this bit will also set the BMEN bit in the Device Control Register.
Electrical Specifications
131