W83C553FY-G Nuvoton Technology Corporation of America, W83C553FY-G Datasheet - Page 18

• Manufacturer Part Number: W83C553FY-G
• Manufacturer: Nuvoton Technology Corporation of America

Specifications of W83C553FY-G

• Lead Free Status / RoHS Status: Compliant

W83C553F
WINBOND SYSTEMS LABORATORY
XCS1/X8XCS
Pin Name
SECURITY /
XRD#
IRQ1
IRQ8#
XOE#
XCS0/
ROMCS
Pin #
116
121
120
117
119
118
Input/
Output
Output/
Input
Input
Input
Output/
Input
Output
Output
Table 2-6. X Bus Signals
Description
X Bus Read. When active "0", data flows from XD to SD. When
the W83C553F is in PowerPC mode, this pin is sampled after reset
and its value is reflected in bit 2 of the Port 92 register (see page
107).
Keyboard Controller Interrupt.
Real Time Clock Interrupt.
X Bus Buffer Enable. This signal enables an external X-bus buffer
whenever an X-bus device is decoded. This pin is a strap pin, needs
a 2.2k Ohm resistor pull up, otherwise will be in test mode.
This is a multi-function pin. When the W83C553F is in PowerPC
mode, this pin functions as the chip select for an external ROM,
using default ISA memory cycle timing. When the W83C553F is in
x86 mode, this pin functions as the lower bit of the X-bus Address.
This is a multi-function pin. When the W83C553F is in PowerPC
mode, this pin functions as the chip select for ports in the 800h-
8FFh I/O address range. When the W83C553F is in x86 mode, this
pin functions as the upper bit of the X-bus Address. In x86 mode,
an external decoder is required to decode the chip selects for X-bus
devices:
XCS[1:0]
00
01
10
11
Device
Idle
RTC Address Latch
RTC Data Port
ROM/BIOS or Keyboard Controller
Pin Descriptions
25