W83C553FY-G Nuvoton Technology Corporation of America, W83C553FY-G Datasheet - Page 137

• Manufacturer Part Number: W83C553FY-G
• Manufacturer: Nuvoton Technology Corporation of America

Specifications of W83C553FY-G

• Lead Free Status / RoHS Status: Compliant

W83C553F
t2
t2
t2i
t3
t4
WINBOND SYSTEMS LABORATORY
IDEIOR[A:B]# / IDEIOW[A:B]# Mode 0
16-bit
Pulse Width 8-bit
IDEIOR[A:B]# / IDEIOW[A:B]# Mode 0
recovery time
IDEIOW[A:B]#
data setup
IDEIOW[A:B]# data hold
Parameter
Table 6-6 (continued). PIO ATA Data Transfer Timing
Mode 1
Mode 2
Mode 3
Mode 4
Mode 5
Mode 0
Mode 1
Mode 2
Mode 3
Mode 4
Mode 5
Mode 1
Mode 2
Mode 3
Mode 4
Mode 5
Mode 0
Mode 1
Mode 2
Mode 3
Mode 4
Mode 5
Mode 0
Mode 1
Mode 2
Mode 3
Mode 4
Mode 5
Min
165ns
125ns
100ns
80ns
70ns
290ns
290ns
290ns
80ns
70ns
-
-
-
70ns
25ns
60ns
45ns
30ns
30ns
20ns
30ns
20ns
15ns
10ns
10ns
Values
Max
t0 is the minimum total cycle time, t2 is the
minimum command active time, and t2i is
the minimum command recovery time or
command inactive time. The actual cycle
time equals the sum of the actual command
active time and the actual command inactive
time. The three timing requirements of t0,
t2, t2i shall be met. The minimum total
cycle time requirement, t0, is greater than
the sum of t2 and t2i. This means host
implementation
can lengthen either or both t2 and t2i. to
ensure that t0 is equal to the value reported
in the devices identify drive data. A device
implementation shall support any legal host
implementation.
Notes
Timing Diagrams
144