W83C553FY-G Nuvoton Technology Corporation of America, W83C553FY-G Datasheet - Page 48

• Manufacturer Part Number: W83C553FY-G
• Manufacturer: Nuvoton Technology Corporation of America

Specifications of W83C553FY-G

• Lead Free Status / RoHS Status: Compliant

W83C553F
Command Register (default = 0007h)
Type:
Bit Description:
WINBOND SYSTEMS LABORATORY
Bits [15:10]:
Bit 9:
Bit 8:
Bit 7:
Bit 6:
Bit 5:
Bit 4:
Bit 3:
Bit 2:
Bit 1:
Bit 0:
Read/Write
Reserved. These read only bits are all set to "0".
Fast Back-to-Back Enable. W83C553F does not generate fast back-to-back cycles. This read
only bit is set to "0".
SERR# Enable. W83C553F does not drive the SERR# pin. Defaults to "0".
Wait Cycle Control. W83C553F does not use address/data stepping. This read only bit is set
to "0".
Parity Error Response. This is a read/write bit.
VGA Palette Snoop. W83C553F is not a VGA device. This read only bit is set to "0".
Memory Write and Invalidate Enable. W83C553F does not generate memory write and
invalidate commands. This read only bit is set to "0".
Special Cycles. W83C553F ignores all special cycles when reset. Defaults to "0".
Bus Master. Always enabled. This read only bit is set to "1".
Memory Space. Always enabled. This read only bit is set to "1".
I/O Space. Always enabled. This read only bit is set to "1".
Electrical Specifications
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