W83C553FY-G Nuvoton Technology Corporation of America, W83C553FY-G Datasheet - Page 87

• Manufacturer Part Number: W83C553FY-G
• Manufacturer: Nuvoton Technology Corporation of America

Specifications of W83C553FY-G

• Lead Free Status / RoHS Status: Compliant

W83C553F
4.2.2
Initialization Command Word 1 Register (default = 19h)
Function:
Type:
Bit Description:
WINBOND SYSTEMS LABORATORY
Bits [7:5]:
Bit 4:
Bit 3:
Bit 2:
Bit 1:
Bit 0:
Programmable Interrupt Controller (PIC) Registers
A write to the Initialization Command Word 1 (ICW1) Register starts the interrupt controller
initialization sequence. Addresses 20h and A0h are referred to as the base address of Interrupt
Controllers #1 and #2 respectively. An I/O write to the Interrupt Controller #1 or #2 base address, with
bit 4 equal to "1," is interpreted as ICW1. For W83C553F based ISA systems, three I/O writes to "base
address +1" must follow the ICW1 to perform writes to ICW2, ICW3 and ICW4.
Write Only
Reserved. These bits are not needed by the W83C553F and should be "000" while
programming.
ICW1SEL. This bit must be a "1" to select ICW1. After the fixed initialization sequence to
ICW1, ICW2, ICW3 and ICW4, the controller base address is used to write to OCW2 and
OCW3. Bit 4 is "0" on writes to these registers.
LTIM. This bit is always ignored and read as a "1."
Reserved (ADI). This bit is ignored by the W83C553F.
SNGL. This bit must be programmed to a "0," indicating the two interrupt controllers are
operating in cascade mode.
IC4. ICSW4 Write Required. This bit must be set to a "1," indicating the ICW4 needs to be
programmed (that is, the controllers are operating in an x86 type system).
Electrical Specifications
94