ALXD800EEXJ2VC C3 AMD (ADVANCED MICRO DEVICES), ALXD800EEXJ2VC C3 Datasheet - Page 154

• Manufacturer Part Number: ALXD800EEXJ2VC C3
• Manufacturer: AMD (ADVANCED MICRO DEVICES)

Specifications of ALXD800EEXJ2VC C3

• Operating Temperature (min): 0C
• Operating Temperature (max): 85C
• Operating Temperature Classification: Commercial
• Mounting: Surface Mount
• Lead Free Status / RoHS Status: Not Compliant

5.5.2.55 Instruction Cache Tag with Increment (IC_TAG_I_MSR)
MSR Address
Type
Reset Value
5.5.2.56 L0 Instruction Cache Data MSR (L0_IC_DATA_MSR)
MSR Address
Type
Reset Value
5.5.2.57 L0 Instruction Cache Tag with Increment MSR (L0_IC_TAG_I_MSR)
MSR Address
Type
Reset Value
154
63 62 61 60 59 58 57 56 55 54 53 52 51 50 49 48 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33 32
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10
63 62 61 60 59 58 57 56 55 54 53 52 51 50 49 48 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33 32
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10
63 62 61 60 59 58 57 56 55 54 53 52 51 50 49 48 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33 32
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10
63:0
63:0
Bits
Bit
Name
---
Name
DATA
00001713h
R/W
00000000_00000000h
00001714h
RO
xxxxxxxx_xxxxxxxxh
00001715h
RO
00000000_xxxxxxxxh
33234H
TLB_NUM
RSVD
Description
Definition same as Instruction Cache Tag MSR (MSR 00001712h). Except read/write
of this register causes an auto-increment on the IC_INDEX_MSR (MSR 00001710h).
Description
QWORD Read from L0 Cache. The address to the QWORD specified by the LINE field
from IC_INDEX_MSR (MSR 00001710h[4:0]).
TAG
L0_IC_DATA_MSR Bit Descriptions
L0_IC_TAG_I_MSR Register Map
L0_IC_DATA_MSR Register Map
IC_TAG_I_MSR Bit Descriptions
IC_TAG_I_MSR Register Map
DATA (Upper)
DATA (Lower)
RSVD
RSVD
TAG
AMD Geode™ LX Processors Data Book
9
9
9
8
8
8
CPU Core Register Descriptions
LRU
7
7
7
RSVD
6
6
6
LINE
5
5
5
4
4
4
3
3
3
RSVD
2
2
2
1
1
1
V
0
0
0
V