ALXD800EEXJ2VC C3 AMD (ADVANCED MICRO DEVICES), ALXD800EEXJ2VC C3 Datasheet - Page 403

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ALXD800EEXJ2VC C3

Manufacturer Part Number
ALXD800EEXJ2VC C3
Description
Manufacturer
AMD (ADVANCED MICRO DEVICES)
Datasheet

Specifications of ALXD800EEXJ2VC C3

Operating Temperature (min)
0C
Operating Temperature (max)
85C
Operating Temperature Classification
Commercial
Mounting
Surface Mount
Lead Free Status / RoHS Status
Not Compliant
Video Processor
VIP 2.0 Modes (8 or 16 bits)
VIP 2.0 mode builds on VIP 1.1 with the following changes/
additions:
AMD Geode™ LX Processors Data Book
vip_data[15:8]
— Video Flags T, F, and V are valid in the EAV and
— Task bit differentiates between two video streams.
Start of Digital Line
vip_data[7:0]
vip_data[7:0]
SAV code, valid values must appear no later then the
SAV of the first scan line of the next active region
(see Figure 6-35).
These streams can be interleaved at a line or field
rate.
F
F
F
F
EAV Code
EAV Code
0
0
0
0
4
4
0
0
0
0
X
Y
X
Y
8
0
1
0
8
0
Horizontal Blanking
1
0
Horizontal Blanking
1
0
8
0
Figure 6-35. BT.656 8/16 Bit Line Data
8
0
1
0
8
0
1
0
1
0
8
0
8-Bit VIP Data (VIP 1.1 and VIP 2.0 Level I)
16-Bit VIP Data (VIP 2.0 Level II)
8
0
1
0
8
0
1
0
1
0
8
0
F
F
F
F
SAV Code
SAV Code
0
0
0
0
— New Video Flags - The P Nibble is redefined as
4
4
0
0
0
0
[NON_INT,REPEAT,Reserved,EXT_FLAG].
– NON_INT - 1 = non-interlaced source, 0 = inter-
– REPEAT - 1 = repeat field in 3:2 pull-down,
– EXT_FLAG - 1 = extra flag byte follows this EAV,
X
Y
laced source.
0 = not a repeat field (tied to 0).
0 = no extra flag byte (this flag is always 0).
X
Y
C
B
4:2:2 Sampled Video Data
4:2:2 Sampled Video Data EAV Code
Y
C
B
Y
Y
C
R
Active Video
Active Video
C
R
Y
C
B
Y C
C
R
Y Y
B
C
B
33234H
Y
Y
C
R
C
R
Y
C
B
F
F
F
F
EAV Code
0
0
0
0
4
0
0
0
0
X
Y
X
Y
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