ALXD800EEXJ2VC C3 AMD (ADVANCED MICRO DEVICES), ALXD800EEXJ2VC C3 Datasheet - Page 364

• Manufacturer Part Number: ALXD800EEXJ2VC C3
• Manufacturer: AMD (ADVANCED MICRO DEVICES)

Specifications of ALXD800EEXJ2VC C3

• Operating Temperature (min): 0C
• Operating Temperature (max): 85C
• Operating Temperature Classification: Commercial
• Mounting: Surface Mount
• Lead Free Status / RoHS Status: Not Compliant

6.6.19.6 Horizontal Blank End
Index
Type
Reset Value
6.6.19.7 Horizontal Sync Start
Index
Type
Reset Value
6.6.19.8 Horizontal Sync End
Index
Type
Reset Value
364
Bit
6:5
4:0
Bit
7:0
Bit
6:5
4:0
7
7
Name
RSVD
DISPEN_SKEW
H_BLANK_END
[4:0]
Name
H_SYNC_ST
Name
H_BLANK_END5
RSVD
H_SYNC_END
03h
R/W
00h
04h
R/W
00h
05h
R/W
00h
33234H
Description
Reserved. Set to 1.
Display Enable Skew Control. This value is a binary encoded value that specifies how
many character clocks to skew the horizontal display enable signal by (0 character clocks
- 3 character clocks) before it is sent to the attribute controller. This field is used to
accommodate differences in the length of the video pipeline (frame buffer to pixel output)
in various text and graphics modes.
Horizontal Blank End Register Bits [4:0]. This 6-bit value is a compare target for the
character count where the horizontal blank signal ends. Bit 5 of this value is in the Hori-
zontal Sync End register (Index 05h[7]). Note that not all horizontal counter bits are com-
pared, which can create aliased compares depending upon the binary values involved in
the count range and compare values.
Description
Horizontal Sync Start. This value specifies the character position where the horizontal
sync pulse starts.
Horizontal Sync Start Register Bit Descriptions
Horizontal Blank End Register Bit Descriptions
Horizontal Sync End Register Bit Descriptions
Description
Horizontal Blank End bit 5. See H_BLANK_END[4:0] bit description (Index 03h[4:0]).
Not Implemented. (HSync Delay).
Horizontal Sync End. These bits represent the low five bits of the character position
where the horizontal sync signal ends.
Display Controller Register Descriptions
AMD Geode™ LX Processors Data Book