ALXD800EEXJ2VC C3 AMD (ADVANCED MICRO DEVICES), ALXD800EEXJ2VC C3 Datasheet - Page 368

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ALXD800EEXJ2VC C3

Manufacturer Part Number
ALXD800EEXJ2VC C3
Description
Manufacturer
AMD (ADVANCED MICRO DEVICES)
Datasheet

Specifications of ALXD800EEXJ2VC C3

Operating Temperature (min)
0C
Operating Temperature (max)
85C
Operating Temperature Classification
Commercial
Mounting
Surface Mount
Lead Free Status / RoHS Status
Not Compliant
6.6.19.18 Cursor Location Low
Index
Type
Reset Value
6.6.19.19 Vertical Sync Start
Index
Type
Reset Value
6.6.19.20 Vertical Sync End
Index
Type
Reset Value
368
Bit
7:0
Bit
7:0
Bit
3:0
7
6
5
4
Name
CURS_LOW
Name
VERT_SYNC_ST
Name
WR_PROT
RSVD
RSVD
RSVD
V_SYNC_END
0Fh
R/W
00h
10h
R/W
00h
11h
R/W
00h
33234H
Description
Cursor Location Register Bits [7:0]. Together with the register (CURS_HI, Index
0Eh[7:0]), this value specifies the frame buffer address where the cursor is displayed in
text mode. The cursor will appear at the character whose memory address corresponds
to this value.
Cursor Location Low Register Bit Descriptions
Description
Vertical Sync Start Register Bits [7:0]. This value specifies the scan line number
where the vertical sync signal will go active. This is a 10-bit value. Bits 9 and 8 are in the
Overflow register (Index 07h[7,2]).
Description
Write-Protect Registers. This bit is used to prevent old EGA programs from writing
invalid values to the VGA horizontal timing registers. The LINE_COMP8 (Index 07h[4])
is not protected by this bit.
Not Implemented. (Refresh Cycle Select)
Not Implemented. (Enable Vertical Interrupt)
Not Implemented.(Clear Vertical Interrupt)
Vertical Sync End Register Bits [3:0]. This field represents the low four bits of a com-
pare value that specifies which scan line that the vertical sync signal goes inactive.
Vertical Sync Start Register Bit Descriptions
Vertical Sync End Register Bit Descriptions
Display Controller Register Descriptions
AMD Geode™ LX Processors Data Book

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