ALXD800EEXJ2VC C3 AMD (ADVANCED MICRO DEVICES), ALXD800EEXJ2VC C3 Datasheet - Page 469
ALXD800EEXJ2VC C3
Manufacturer Part Number
ALXD800EEXJ2VC C3
Description
Manufacturer
AMD (ADVANCED MICRO DEVICES)
Datasheet
1.ALXD800EEXJ2VC_C3.pdf
(680 pages)
Specifications of ALXD800EEXJ2VC C3
Operating Temperature (min)
0C
Operating Temperature (max)
85C
Operating Temperature Classification
Commercial
Mounting
Surface Mount
Lead Free Status / RoHS Status
Not Compliant
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Video Input Port
6.9.5.2
Ancillary packets are received during vertical and/or hori-
zontal blanking. The ancillary packet has a 6-byte header
of 00-FF-FF-DID-SDID-NN. The first three bytes are the
pre-amble. The DID and SDID bytes are the data identifier
and the secondary data identifier bytes. The NN byte is the
data count and specifies the length of the ancillary data
block in DWORDs (4-byte blocks). The entire ancillary data
packet is stored to memory, including all 6 bytes of pream-
ble/header. See Section 6.9.10 on page 475 for further
AMD Geode™ LX Processors Data Book
Ancillary Packets
VID[7:0]
VID[7:0]
VID[15:8]
6 Byte Ancillary Header
6 Byte Ancillary Header
0
0
X X
0
0
F
F
F
F
F
F
F
F
X X
D
D
D
D D
I
Figure 6-42. Ancillary Data Packets
I
First DWORD
S
I
S
D
X X d1 d3 d5 d7
I
DWORD
8/10-BIT ANCILLARY PACKET
First
16-BIT ANCILLARY PACKET
N
N
N
N
d0 d2 d4 d6
D
D
I
D
D
I
d0 d1 d2
explanation. There is no restriction on the code in the data
section of the packet (codes 00 and FF are allowed) The
SAV/EAV packet preamble detection circuitry is disabled
during the reception of these NN blocks of data to allow
reception of 00, FF codes. The active data is received on
bits [7:0] in 8-bit mode, [9:0] in 10-bit mode and on [15:0] in
16-bit mode.
A sample ancillary packet is shown in Figure 6-42.
d
d
d
d
d
d
d
d
d
Last DWORD
d
d
d
check sum
d
d
d
DWORD
check
Last
d
d
fill byte
sum
fill byte
33234H
469
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