ALXD800EEXJ2VC C3 AMD (ADVANCED MICRO DEVICES), ALXD800EEXJ2VC C3 Datasheet - Page 417

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ALXD800EEXJ2VC C3

Manufacturer Part Number
ALXD800EEXJ2VC C3
Description
Manufacturer
AMD (ADVANCED MICRO DEVICES)
Datasheet

Specifications of ALXD800EEXJ2VC C3

Operating Temperature (min)
0C
Operating Temperature (max)
85C
Operating Temperature Classification
Commercial
Mounting
Surface Mount
Lead Free Status / RoHS Status
Not Compliant
Video Processor Register Descriptions
6.8.1.3
MSR Address
Type
Reset Value
The Video Processor does not produce SMI interrupts, therefore this register is not used. Always write 0.
6.8.1.4
MSR Address
Type
Reset Value
AMD Geode™ LX Processors Data Book
63 62 61 60 59 58 57 56 55 54 53 52 51 50 49 48 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33 32
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10
63:33
31:1
Bit
32
0
GLD SMI MSR (GLD_MSR_SMI)
GLD Error MSR (GLD_MSR_ERROR)
Name
RSVD (RO)
E
RSVD (RO)
EM
48002002h
R/W
00000000_00000000h
48002003h
R/W
00000000_00000000h
Description
Reserved (Read Only). Reads back as 0.
VP Error Status. Any GLIU request made of an unsupported function type causes this
bit to be set by the hardware. Writing a 1 to this bit clears the status. Bit 0 must be 0 for
the error to be generated.
0: Error not pending.
1: Error pending.
Reserved (Read Only).
DF Error Mask.
0: Unmask the Error (i.e., error generation is enabled).
1: Mask the Error (i.e., error generation is disabled).
GLD_MSR_ERROR Bit Descriptions
GLD_MSR_ERROR Register Map
RSVD
RSVD
9
8
33234H
7
6
5
4
3
2
1
417
0

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