EP1S10F484I6 Altera, EP1S10F484I6 Datasheet - Page 563

• Manufacturer Part Number: EP1S10F484I6
• Description: IC STRATIX FPGA 10K LE 484-FBGA
• Manufacturer: Altera
• Series: Stratix®r

Specifications of EP1S10F484I6

• Number Of Logic Elements/cells: 10570
• Number Of Labs/clbs: 1057
• Total Ram Bits: 920448
• Number Of I /o: 335
• Voltage - Supply: 1.425 V ~ 1.575 V
• Mounting Type: Surface Mount
• Operating Temperature: 0°C ~ 85°C
• Package / Case: 484-FBGA
• Family Name: Stratix
• Number Of Logic Blocks/elements: 10570
• # I/os (max): 335
• Frequency (max): 450.05MHz
• Process Technology: 0.13um (CMOS)
• Operating Supply Voltage (typ): 1.5V
• Logic Cells: 10570
• Ram Bits: 920448
• Operating Supply Voltage (min): 1.425V
• Operating Supply Voltage (max): 1.575V
• Operating Temp Range: -40C to 100C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 484
• Package Type: FC-FBGA
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Number Of Gates: -
• Lead Free Status / Rohs Status: Not Compliant

Altera Corporation
July 2005
Because the DSP block outputs communicate horizontally, and because
each DSP block row has more outputs than an LAB (18 from the DSP
block compared to 10 from an LAB), the DSP block has double the
number of row channel drivers compared to an LAB. The DSP block has
the same number of row channels, but the row channels are staggered as
if there were two LABs within each block. The DSP blocks have the same
number of column channels as LABs because DSP blocks communicate
primarily through row channels.
Row Interface Block
Each row interface block connects to the DSP block row structure with
21 signals. Because each DSP block has eight row interface blocks, this
block receives 162 signals from the eight row interfaces. Of the
162 signals, 144 are data inputs and 18 are control signals.
page 6–14
shows one row block within the DSP block.
DSP Blocks in Stratix & Stratix GX Devices
Stratix Device Handbook, Volume 2
Figure 6–7 on
6–13