EP1S10F484I6 Altera, EP1S10F484I6 Datasheet - Page 797
![IC STRATIX FPGA 10K LE 484-FBGA](/photos/6/72/67258/544-484-fbga_sml.jpg)
EP1S10F484I6
Manufacturer Part Number
EP1S10F484I6
Description
IC STRATIX FPGA 10K LE 484-FBGA
Manufacturer
Altera
Series
Stratix®r
Specifications of EP1S10F484I6
Number Of Logic Elements/cells
10570
Number Of Labs/clbs
1057
Total Ram Bits
920448
Number Of I /o
335
Voltage - Supply
1.425 V ~ 1.575 V
Mounting Type
Surface Mount
Operating Temperature
0°C ~ 85°C
Package / Case
484-FBGA
Family Name
Stratix
Number Of Logic Blocks/elements
10570
# I/os (max)
335
Frequency (max)
450.05MHz
Process Technology
0.13um (CMOS)
Operating Supply Voltage (typ)
1.5V
Logic Cells
10570
Ram Bits
920448
Operating Supply Voltage (min)
1.425V
Operating Supply Voltage (max)
1.575V
Operating Temp Range
-40C to 100C
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Pin Count
484
Package Type
FC-FBGA
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Number Of Gates
-
Lead Free Status / Rohs Status
Not Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
EP1S10F484I6
Manufacturer:
ALTERA
Quantity:
3 000
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Using Enhanced
Configuration
Devices
Altera Corporation
September 2004
f
f
For more information on the control signals for the remote block, see
Table 12–3 on page
This section describes remote system configuration of Stratix and
Stratix GX devices with the Nios embedded processor using enhanced
configuration devices. Enhanced configuration devices are composed of
a standard flash memory and a controller. The flash memory stores
configuration data, and the controller reads and writes to the flash
memory.
In remote system configuration, only PS and FPP modes are supported
using an enhanced configuration device. A Stratix or Stratix GX device
running a Nios embedded processor can receive data from a remote
source through a network or any other appropriate media. A specific
page of the enhanced configuration device stores the received data.
This scheme uses the page mode option in Stratix and Strati GX devices.
Up to eight pages can be stored in each enhanced configuration device,
each of which can store a configuration file.
In enhanced configuration devices, a page is a section of the flash
memory space. Its boundary is determined by the Quartus II software
(the page size is programmable). In the software, you can specify which
configuration file should be stored in which page within the flash
memory. To access the configuration file on each page, set the three input
pins (PGM[2..0]), which provide access to all eight pages. Because the
PGM[2..0] pins of an enhanced configuration device connect to the
same pins of the Stratix or Stratix GX device, the Stratix or Stratix GX
device selects one of the eight memory pages as a target location to read
from.
enhanced configuration device.
For more information on enhanced configuration devices, see the
Enhanced Configuration Devices (EPC4, EPC8 & EPC16) Data Sheet and the
Altera Enhanced Configuration Devices chapter.
Figure 12–11
Remote System Configuration with Stratix & Stratix GX Devices
shows the allocation of different pages in the
12–9.
Stratix Device Handbook, Volume 2
12–19
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