EP1S10F484I6 Altera, EP1S10F484I6 Datasheet - Page 793

• Manufacturer Part Number: EP1S10F484I6
• Description: IC STRATIX FPGA 10K LE 484-FBGA
• Manufacturer: Altera
• Series: Stratix®r

Specifications of EP1S10F484I6

• Number Of Logic Elements/cells: 10570
• Number Of Labs/clbs: 1057
• Total Ram Bits: 920448
• Number Of I /o: 335
• Voltage - Supply: 1.425 V ~ 1.575 V
• Mounting Type: Surface Mount
• Operating Temperature: 0°C ~ 85°C
• Package / Case: 484-FBGA
• Family Name: Stratix
• Number Of Logic Blocks/elements: 10570
• # I/os (max): 335
• Frequency (max): 450.05MHz
• Process Technology: 0.13um (CMOS)
• Operating Supply Voltage (typ): 1.5V
• Logic Cells: 10570
• Ram Bits: 920448
• Operating Supply Voltage (min): 1.425V
• Operating Supply Voltage (max): 1.575V
• Operating Temp Range: -40C to 100C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 484
• Package Type: FC-FBGA
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Number Of Gates: -
• Lead Free Status / Rohs Status: Not Compliant

Altera Corporation
September 2004
(1)
Note to
data_in[11..0]
Table 12–6. Input Ports of the altremote_update Megafunction (Part 2 of 2)
write_param
read_param
param[2..0]
Port Name
Logic array source means that you can drive the port from internal logic or any general-purpose I/O pin.
Table
12–6:
Required
N
N
N
N
Logic Array Once
Logic Array This signal is required if you intend on writing parameters to the
Logic Array 3-bit bus that selects which parameter should be read or written. If this
Logic Array This signal is required if you intend on writing parameters to the
Source
asserted. While the parameter is being read, the busy signal remains
asserted, and inputs on
is deactivated, the next parameter can be read. If this port is left
unconnected, the default value is 0.
remote update block. When driven logic high, the parameter specified
on the
with the value on
data_in[]
sampled on the rising edge of clock and should only be asserted for
one clock cycle to prevent the parameter from being re-read on
subsequent clock cycles. Once
high, the busy signal is asserted. While the parameter is being
written, the busy signal remains asserted, and inputs on
and
the next parameter can be written. This signal is only valid when the
Current_Configuration
cannot be written in application configurations. If this port is left
unconnected, the default value is 0.
port is left unconnected, the default value is 0.
remote update block 12-bit bus used when writing parameters, which
specifies the parameter value. The parameter value is requested
using the
logic high, at which point the busy signal goes logic high and the value
of the parameter is captured from this bus. For some parameters, not
all 12-bits will be used in which case only the least significant bits will
be used. This port is ignored if the
parameter is set to an application configuration since writing of
parameters is only allowed in the factory configuration. If this port is
left unconnected, the default values is 0.
Remote System Configuration with Stratix & Stratix GX Devices
data_in[]
read_param
param[]
param[]
is dependent on the parameter type. This signal is
data_in[]
port should be written to the remote update block
are ignored. Once the busy signal is deactivated,
input and by driving the
is sampled as a logic high, the busy signal is
param[]
Description
. The number of valid bits on
parameter is factory since parameters
write_param
Stratix Device Handbook, Volume 2
are ignored. Once the busy signal
Current_Configuration
write_param
is sampled as a logic
param[]
signal
12–15