EP1S10F484I6 Altera, EP1S10F484I6 Datasheet - Page 808

• Manufacturer Part Number: EP1S10F484I6
• Description: IC STRATIX FPGA 10K LE 484-FBGA
• Manufacturer: Altera
• Series: Stratix®r

Specifications of EP1S10F484I6

• Number Of Logic Elements/cells: 10570
• Number Of Labs/clbs: 1057
• Total Ram Bits: 920448
• Number Of I /o: 335
• Voltage - Supply: 1.425 V ~ 1.575 V
• Mounting Type: Surface Mount
• Operating Temperature: 0°C ~ 85°C
• Package / Case: 484-FBGA
• Family Name: Stratix
• Number Of Logic Blocks/elements: 10570
• # I/os (max): 335
• Frequency (max): 450.05MHz
• Process Technology: 0.13um (CMOS)
• Operating Supply Voltage (typ): 1.5V
• Logic Cells: 10570
• Ram Bits: 920448
• Operating Supply Voltage (min): 1.425V
• Operating Supply Voltage (max): 1.575V
• Operating Temp Range: -40C to 100C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 484
• Package Type: FC-FBGA
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Number Of Gates: -
• Lead Free Status / Rohs Status: Not Compliant

Using Enhanced Configuration Devices
12–30
Stratix Device Handbook, Volume 2
block addressing was used, you should specify the block start and end
addresses. With this information, Quartus II ensures that the partial
programming file only updates the flash region containing the
application configuration. The factory configuration (page 0) and
configuration option bits are left unaltered during this process.
Figure 12–17
programming file:
1.
2.
3.
4.
5.
6.
7.
8.
9.
10. Click OK to generate initial programming and memory map files.
Open the Convert Programming Files window from the File menu.
Select Programmer Object File for Local Update (.pof) from the
drop-down list titled Programming file type, and specify an output
File name.
In the Input files to convert box, highlight POF Data and click Add
File. Select the initial programming POF file for this design and
insert it.
In the Input files to convert box, highlight SOF Data and click Add
File. Select the new application configuration bitstream (SOF) and
insert it.
When using block addressing, select the SOF Data entry for Page 1,
and click Properties. This opens the SOF Data Properties dialog
box (see
Pick Block from the Address Mode drop down selection, and enter
32-bit Hexadecimal byte address for block Starting Address and
Ending Address. These addresses should be identical to those used
to generate the initial programming file. Click OK to save SOF data
properties.
Check the Memory Map File box to generate a memory map output
file that specifies the start/end addresses of the new application
configuration data in page 1.
Pick a local update difference file from the Remote/Local Update
Difference File drop-down menu. You can select between an Intel
HEX, JAM, JBC, and POF output file types. The output file name is
the same as the POF output file name with a _dif suffix.
Save the CPF setup (optionally), by selecting Save Conversion
Setup… and specifying a name for the COF output file.
and the following steps illustrate generation of a partial
Figure
12–18).
Altera Corporation
September 2004