EP1S10F484I6 Altera, EP1S10F484I6 Datasheet - Page 823
![IC STRATIX FPGA 10K LE 484-FBGA](/photos/6/72/67258/544-484-fbga_sml.jpg)
EP1S10F484I6
Manufacturer Part Number
EP1S10F484I6
Description
IC STRATIX FPGA 10K LE 484-FBGA
Manufacturer
Altera
Series
Stratix®r
Specifications of EP1S10F484I6
Number Of Logic Elements/cells
10570
Number Of Labs/clbs
1057
Total Ram Bits
920448
Number Of I /o
335
Voltage - Supply
1.425 V ~ 1.575 V
Mounting Type
Surface Mount
Operating Temperature
0°C ~ 85°C
Package / Case
484-FBGA
Family Name
Stratix
Number Of Logic Blocks/elements
10570
# I/os (max)
335
Frequency (max)
450.05MHz
Process Technology
0.13um (CMOS)
Operating Supply Voltage (typ)
1.5V
Logic Cells
10570
Ram Bits
920448
Operating Supply Voltage (min)
1.425V
Operating Supply Voltage (max)
1.575V
Operating Temp Range
-40C to 100C
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Pin Count
484
Package Type
FC-FBGA
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Number Of Gates
-
Lead Free Status / Rohs Status
Not Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
EP1S10F484I6
Manufacturer:
ALTERA
Quantity:
3 000
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Revision History
Altera Corporation
Chapter
13
14
September 2004, v2.1
September 2004, v1.1
January 2005, v1.2
April 2003, v1.0
April 2003, v1.0
July 2005, v3.0
Date/Version
This section provides information for board layout designers to
successfully layout their boards for Stratix
the required PCB layout guidelines and package specifications.
This section contains the following chapters:
■
■
The table below shows the revision history for
Chapter 13, Package Information for Stratix Devices
Chapter 14, Designing with 1.5-V Devices
Updated packaging information.
●
●
●
●
●
●
●
Changed from Chapter 8, Volume 3 to Chapter 13, Volume 2.
Corrected spelling error.
No new changes in Stratix Device Handbook v2.0.
This chapter was formerly chapter 15.
Changed from Chapter 10, Volume 3 to Chapter 15, Volume 2.
Corrected spelling error.
No new changes in Stratix Device Handbook v2.0.
Section VII. PCB Layout
Changes Made
®
devices. This section contains
Chapters 13
Guidelines
and 14.
Section VII–1
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