ADUC7033BCPZ-8L-RL Analog Devices Inc, ADUC7033BCPZ-8L-RL Datasheet - Page 105

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ADUC7033BCPZ-8L-RL

Manufacturer Part Number
ADUC7033BCPZ-8L-RL
Description
IC MCU FLASH 96K ANLG I/O 48LFCS
Manufacturer
Analog Devices Inc
Type
Battery Managementr
Datasheets

Specifications of ADUC7033BCPZ-8L-RL

Input Type
Logic
Output Type
Logic
Interface
UART, SPI
Current - Supply
20mA
Mounting Type
Surface Mount
Package / Case
*
For Use With
EVAL-ADUC7033QSPZ - EVAL DEV QUICK START ADUC7033
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
High Voltage Status Register
Name:
Address:
Default Value:
Access:
Function:
Table 77. HVSTA Bit Designations
Bit
7 to 6
5
4
3
2
1
0
HVSTA
Indirectly addressed via the HVCON high voltage interface
0x00
Read only, this register should only be read on a high voltage interrupt
This 8-bit, read-only register reflects a change of state for all the corresponding bits in the HVMON register. This
register is not an MMR and does not appear in the MMR memory map. It is accessed through the HVCON registered
interface and data is read back from this register via HVDAT. In response to a high voltage interrupt event, the high
voltage interrupt controller simultaneously and automatically loads the current value of the high voltage status register
(HVSTA) into the HVDAT register.
Description
Reserved. These bits should not be used and are reserved for future use.
PSM Status Bit. Valid only if enabled via HVCFG0[3]. This bit is not latched and the IRQ needs to be enabled to detect it.
This bit is 0 if the voltage at the VDD pin stays above 6.0 V.
This bit is 1 if the voltage at the VDD pin drops below 6.0 V.
WU Request Status Bit. Valid only if enabled via HVCFG1[4]. When enabled via HVCFG1[4], this bit is set to 1 to indicate
that a rising or falling edge transition on the WU pin generated a high voltage interrupt.
Overtemperature. This bit is always enabled.
This bit is 0 if a thermal shutdown event has not occurred.
This bit is 1 if a thermal shutdown event has occurred. All high voltage (LIN/BSD, WU, and STI) pin drivers are
automatically disabled once a thermal shutdown has occurred.
LIN/BSD Short-Circuit Status Flag.
This bit is 0 during normal LIN/BSD operation and is cleared automatically by reading the HVSTA register.
This bit is 1 if a LIN/BSD short circuit is detected. In this condition, the LIN driver is automatically disabled.
STI Short-Circuit Status Flag.
This bit is 0 if the STI driver is operating normally and is cleared automatically by reading the HVSTA register.
This bit is 1 if the STI driver has experienced a short-circuit condition.
WU Short-Circuit Status Flag.
This bit is 0 during normal wake operation.
This bit is 1 if a wake-up short circuit is detected.
Rev. B | Page 105 of 140
ADuC7033

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