ADUC7033BCPZ-8L-RL Analog Devices Inc, ADUC7033BCPZ-8L-RL Datasheet - Page 21

• Manufacturer Part Number: ADUC7033BCPZ-8L-RL
• Description: IC MCU FLASH 96K ANLG I/O 48LFCS
• Manufacturer: Analog Devices Inc
• Type: Battery Managementr

Specifications of ADUC7033BCPZ-8L-RL

• Input Type: Logic
• Output Type: Logic
• Interface: UART, SPI
• Current - Supply: 20mA
• Mounting Type: Surface Mount
• Package / Case: *
• For Use With: EVAL-ADUC7033QSPZ - EVAL DEV QUICK START ADUC7033
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

THEORY OF OPERATION
The ADuC7033 is a complete system solution for battery
monitoring in 12 V automotive applications. The device
integrates all of the required features to precisely and intelli-
gently monitor, process, and diagnose 12 V battery parameters,
including battery current, voltage, and temperature, over a wide
range of operating conditions.
Minimizing external system components, the device is powered
directly from the 12 V battery. An on-chip, low dropout regulator
generates the supply voltage for two integrated, 16-bit, Σ-Δ ADCs.
The ADCs precisely measure battery current, voltage, and temper-
ature to characterize the state of health and charge of the car
battery.
A Flash/EE memory-based ARM7™ microcontroller (MCU)
is also integrated on-chip. It is used to both preprocess the
acquired battery variables and to manage communications from
the ADuC7033 to the main electronic control unit (ECU) via
a local interconnect network (LIN) interface that is integrated
on-chip.
Both the MCU and the ADC subsystem can be individually
configured to operate in normal or flexible power-saving modes
of operation.
In its normal operating mode, the MCU is clocked indirectly
from an on-chip oscillator via the phase-locked loop (PLL) at
a maximum clock rate of 20.48 MHz. In its power-saving oper-
ating modes, the MCU can be totally powered down, waking
up only in response to an ADC conversion result ready, digital
comparators, the wake-up timer, a POR, or an external serial
communication event.
The ADC can be configured to operate in a normal (full power)
mode of operation, interrupting the MCU after various sample
conversion events. The current channel features two low power
modes, low power and low power plus, generating conversion
results to a lower performance specification.
On-chip factory firmware supports in-circuit Flash/EE memory
reprogramming via the LIN or JTAG serial interface ports, and
nonintrusive emulation is also supported via the JTAG interface.
These features are incorporated into a low cost QuickStart™
development system supporting the ADuC7033.
The ADuC7033 operates directly from the 12 V battery supply
and is fully specified over a temperature range of −40°C to
+115°C. The ADuC7033 is functional, but with degraded
performance, at temperatures from 115°C to 125°C.
OVERVIEW OF THE ARM7TDMI CORE
The ARM7 core is a 32-bit, reduced instruction set computer
(RISC) developed by ARM® Ltd. The ARM7TDMI® is a
von Neumann-based architecture, meaning that it uses a single
32-bit bus for instruction and data. The length of the data can
be 8, 16, or 32 bits and the length of the instruction word is
either 16 bits or 32 bits, depending on the mode in which the
core is operating.
Rev. B | Page 21 of 140
The ARM7TDMI is an ARM7 core with four additional features,
as listed in Table 8.
Table 8. ARM7TDMI
Feature
T
D
M
I
Thumb Mode (T)
An ARM instruction is 32 bits long. The ARM7TDMI
processor supports a second instruction set compressed into
16 bits, called the Thumb instruction set. Faster code execution
from 16-bit memory and greater code density can be achieved
by using the Thumb instruction set, making the ARM7TDMI
core particularly suited for embedded applications.
However, the Thumb mode has three limitations as follows:
•
•
•
Multiplier (M)
The ARM7TDMI instruction set includes an enhanced
multiplier, with four extra instructions to perform 32-bit ×
32-bit multiplication with a 64-bit result, and 32-bit × 32-bit
multiplication accumulation (MAC) with a 64-bit result.
EmbeddedICE (I)
The EmbeddedICE module provides integrated on-chip debug
support for the ARM7TDMI. The EmbeddedICE module
contains the breakpoint and watchpoint registers that allow
nonintrusive user code debugging. These registers are con-
trolled through the JTAG test port. When a breakpoint or
watchpoint is encountered, the processor halts and enters the
debug state. Once in a debug state, the processor registers can
be interrogated, as can the Flash/EE memory, SRAM, and
memory mapped registers.
ARM7 Exceptions
The ARM7 supports five types of exceptions, with a privileged
processing mode associated with each type. The five types of
exceptions are as follows:
Relative to ARM, the Thumb code usually requires more
instructions to perform that same task. Therefore, ARM
code is best for maximizing the performance of time-
critical code in most applications.
The Thumb instruction set does not include some
instructions that are needed for exception handling,
therefore, ARM code can be required for exception
handling.
When an interrupt occurs, the core vectors to the interrupt
location in memory and executes the code present at that
address. The first command is required to be in ARM code.
Description
Support for the Thumb® (16-bit) instruction set
Support for debug
Enhanced multiplier
Includes the EmbeddedICE™ module to support
embedded system debugging
ADuC7033