ADUC7033BCPZ-8L-RL Analog Devices Inc, ADUC7033BCPZ-8L-RL Datasheet - Page 78

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ADUC7033BCPZ-8L-RL

Manufacturer Part Number
ADUC7033BCPZ-8L-RL
Description
IC MCU FLASH 96K ANLG I/O 48LFCS
Manufacturer
Analog Devices Inc
Type
Battery Managementr
Datasheets

Specifications of ADUC7033BCPZ-8L-RL

Input Type
Logic
Output Type
Logic
Interface
UART, SPI
Current - Supply
20mA
Mounting Type
Surface Mount
Package / Case
*
For Use With
EVAL-ADUC7033QSPZ - EVAL DEV QUICK START ADUC7033
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
ADuC7033
Timer0 Control Register
Name:
Address:
Default Value:
Access:
Function:
Table 53. T0CON MMR Bit Designations
Bit
31 to 18
17
16 to 12
11
10 to 9
8
7
6
5
4
3 to 0
T0CON
0xFFFF030C
0x00000000
Read/write
The 32-bit MMR configures the mode of operation for Timer0.
Description
Reserved.
Event Select Bit.
Set by user to enable time capture of an event.
Cleared by user to disable time capture of an event.
Event Select Range (0 to 31). The events are as described in Table 52.
Reserved.
Clock Select.
00 = core clock (default).
01 = low power (32.768 kHz) oscillator.
10 = external (32.768 kHz) watch crystal.
11 = precision (32.768 kHz) oscillator.
Count Up. Available in 16-bit mode only.
Set by user for Timer0 to count up.
Cleared by user for Timer0 to count down (default).
Timer0 Enable Bit.
Set by user to enable Timer0.
Cleared by user to disable Timer0 (default).
Timer0 Mode.
Set by user to operate in periodic mode.
Cleared by user to operate in free running mode (default).
Reserved.
Timer0 Mode of Operation.
0 = 16-bit operation (default).
1 = 48-bit operation.
Prescaler.
0000 = source clock/1 (default).
0100 = source clock/16.
1000 = source clock/256.
1111 = source clock/32,768.
Rev. B | Page 78 of 140

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