ADUC7033BCPZ-8L-RL Analog Devices Inc, ADUC7033BCPZ-8L-RL Datasheet - Page 30

• Manufacturer Part Number: ADUC7033BCPZ-8L-RL
• Description: IC MCU FLASH 96K ANLG I/O 48LFCS
• Manufacturer: Analog Devices Inc
• Type: Battery Managementr

Specifications of ADUC7033BCPZ-8L-RL

• Input Type: Logic
• Output Type: Logic
• Interface: UART, SPI
• Current - Supply: 20mA
• Mounting Type: Surface Mount
• Package / Case: *
• For Use With: EVAL-ADUC7033QSPZ - EVAL DEV QUICK START ADUC7033
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

ADuC7033
FLASH/EE MEMORY SECURITY
The 94 kB of Flash/EE memory available to the user can be read
and write protected using the FFE0HID and FEE1HID
registers.
In Block0, the FEE0HID MMR protects the 30 kB of Flash/EE
memory. Bit 0 to Bit 28 of this register protect Page 0 to Page 57
from writing. Each bit protects two pages, that is, 1 kB. Bit 29 to
Bit 30 protect Page 58 and Page 59 respectively, that is, each bit
write protects a single page of 512 bytes. The MSB of this
register (Bit 31) protects Block0 from been read via JTAG.
The FEE0PRO register mirrors the bit definitions of the
FEE0HID MMR. The FEE0PRO MMR allows user code to
lock the protection or security configuration of the Flash/EE
memory so that the protection configuration is automatically
loaded on subsequent power-on or reset events. This flexibility
Block0, Flash/EE Memory Protection Registers
Name:
Address:
Default Value:
Access:
Function:
Table 16. FEE0HID and FEE0PRO MMR Bit Designations
Bit
31
30
29
28 to 0
Description
Read Protection.
Cleared by user to protect the 32 kB Flash/EE block code through JTAG read access.
Set by user to allow reading of the 32 kB Flash/EE block code through JTAG read access.
Write Protection Bit.
Set by user code to unprotect Page 59.
Cleared by user code to write protect Page 59.
Write Protection Bit.
Set by user code to unprotect Page 58.
Cleared by user code to write protect Page 58.
Write Protection Bits.
When set by user code, these bits unprotect Page 0 to Page 57 of the 30 kB Flash/EE code memory. Each bit write protects two
pages and each page consists of 512 bytes.
When cleared by user code, these bits write protect Page 0 to Page 57 of the 30 kB Flash/EE code memory. Each bit write protects
two pages and each page consists of 512 bytes.
FEE0HID and FEE0PRO
0xFFFF0E20 (for FEE0HID) and 0xFFFF0E1C (for FEE0PRO)
0xFFFFFFFF (for FEE0HID) and 0x00000000 (for FEE0PRO)
Read/write access
These registers are written by user code to configure the protection of the Flash/EE memory.
Rev. B | Page 30 of 140
allows the user to set and test protection settings temporarily
using the FEE0HID MMR and subsequently lock the required
protection configuration (using FEE0PRO) when shipping
protection systems into the field.
In Block1 (64 kB), the FEE1HID MMR protects the 64 kB of
Flash/EE memory. Bit 0 to Bit 29 of this register protect Page 0
to Page 119 from writing. Each bit protects four pages, that is,
2 kB. Bit 30 protects Page 120 to Page 127, that is, Bit 30 write
protects eight pages of 512 bytes. The MSB of this register
(Bit 31) protects Flash/EE Block1, from been read via JTAG.
As with Block0, FEE1PRO register mirrors the bit definitions of
the FEE1HID MMR. The FEE1PRO MMR allows user code to
lock the protection or security configuration of the Flash/EE
memory so that the protection configuration is automatically
loaded on subsequent power-on or reset events.